Christoph Scholl

2009
21	EE	Christoph Scholl, Stefan Disch, Florian Pigorsch, Stefan Kupferschmid: Computing Optimized Representations for Non-convex Polyhedra by Detection and Removal of Redundant Linear Constraints. TACAS 2009: 383-397
2007
20	EE	Stefan Disch, Christoph Scholl: Combinational Equivalence Checking Using Incremental SAT Solving, Output Ordering, and Resets. ASP-DAC 2007: 938-943
19	EE	Werner Damm, Stefan Disch, Hardi Hungar, Swen Jacobs, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz: Exact State Set Representations in the Verification of Linear Hybrid Systems with Large Discrete State Space. ATVA 2007: 425-440
18	EE	Tobias Nopper, Christoph Scholl, Bernd Becker: Computation of minimal counterexamples by using black box techniques and symbolic methods. ICCAD 2007: 273-280
2006
17	EE	Werner Damm, Stefan Disch, Hardi Hungar, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz: Automatic Verification of Hybrid Systems with Large Discrete State Space. ATVA 2006: 276-291
16	EE	Florian Pigorsch, Christoph Scholl, Stefan Disch: Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling. FMCAD 2006: 89-96
15	EE	Marc Herbstritt, Bernd Becker, Christoph Scholl: Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. MTV 2006: 37-44
2004
14	EE	Tobias Nopper, Christoph Scholl: Approximate Symbolic Model Checking for Incomplete Designs. FMCAD 2004: 290-305
2002
13	EE	Christoph Scholl, Bernd Becker: Checking Equivalence for Circuits Containing Incompletely Specified Boxes. ICCD 2002: 56-63
12		Christoph Scholl, Bernd Becker, Thomas M. Weis: On WLCDs and the Complexity of Word-Level Decision Diagrams-A Lower Bound for Division. Formal Methods in System Design 20(3): 311-326 (2002)
2001
11	EE	Christoph Scholl, Bernd Becker, Andreas Brogle: The multiple variable order problem for binary decision diagrams: theory and practical application. ASP-DAC 2001: 85-90
10	EE	Christoph Scholl, Bernd Becker: Checking Equivalence for Partial Implementations. DAC 2001: 238-243
9	EE	Christoph Scholl, Marc Herbstritt, Bernd Becker: Exploiting don't cares to minimize *BMDs. ISCAS (5) 2001: 191-194
2000
8	EE	Andreas Hett, Christoph Scholl, Bernd Becker: Distance driven finite state machine traversal. DAC 2000: 39-42
7	EE	Christoph Scholl, Bernd Becker: On the Generation of Multiplexer Circuits for Pass Transistor Logic. DATE 2000: 372-
1999
6	EE	Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler: BDD minimization using symmetries. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 81-100 (1999)
1998
5	EE	Christoph Scholl: Multi-output Functional Decomposition with Exploitation of Don't Cares. DATE 1998: 743-748
4	EE	Christoph Scholl, Bernd Becker, Thomas M. Weis: Word-level decision diagrams, WLCDs and division. ICCAD 1998: 672-677
1997
3	EE	Christoph Scholl, S. Melchior, Günter Hotz, Paul Molitor: Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries. ED&TC 1997: 229-234
2	EE	Christoph Scholl, Rolf Drechsler, Bernd Becker: Functional simulation using binary decision diagrams. ICCAD 1997: 8-12
1995
1	EE	Christoph Scholl, Paul Molitor: Communication based FPGA synthesis for multi-output Boolean functions. ASP-DAC 1995

Coauthor Index

1	Bernd Becker	[2] [4] [7] [8] [9] [10] [11] [12] [13] [15] [18]
2	Andreas Brogle	[11]
3	Werner Damm	[17] [19]
4	Stefan Disch	[16] [17] [19] [20] [21]
5	Rolf Drechsler	[2] [6]
6	Marc Herbstritt	[9] [15]
7	Andreas Hett	[8]
8	Günter Hotz	[3]
9	Hardi Hungar	[17] [19]
10	Swen Jacobs	[19]
11	Stefan Kupferschmid	[21]
12	S. Melchior	[3]
13	Paul Molitor	[1] [3] [6]
14	Dirk Möller	[6]
15	Tobias Nopper	[14] [18]
16	Jun Pang	[17] [19]
17	Florian Pigorsch	[16] [17] [19] [21]
18	Uwe Waldmann	[17] [19]
19	Thomas M. Weis	[4] [12]
20	Boris Wirtz	[17] [19]