| |
| 2000 | ||
|---|---|---|
| 3 | EE | Tzu-Chieh Tien, Youn-Long Lin: Performance-optimal clustering with retiming for sequential circuits. ASP-DAC 2000: 409-414 |
| 1998 | ||
| 2 | EE | Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin: Integrating logic retiming and register placement. ICCAD 1998: 136-139 |
| 1994 | ||
| 1 | Tsung-Yi Wu, Tzu-Chieh Tien, Allen C.-H. Wu, Youn-Long Lin: A Synthesis Method for Mixed Synchronous / Asynchronous Behavior. EDAC-ETC-EUROASIC 1994: 277-281 | |
| 1 | Yih-Chih Chou | [2] |
| 2 | Youn-Long Lin | [1] [2] [3] |
| 3 | Hsiao-Pin Su | [2] |
| 4 | Yu-Wen Tsay | [2] |
| 5 | Allen C.-H. Wu | [1] |
| 6 | Tsung-Yi Wu | [1] |