Zhanping Chen

2002
15	EE	Zhanping Chen, Liqiong Wei, Ali Keshavarzi, Kaushik Roy: IDDQ Testing for Deep-Submicron ICs: Challenges and Solutions. IEEE Design & Test of Computers 19(2): 24-33 (2002)
14	EE	Liqiong Wei, Rongtian Zhang, Kaushik Roy, Zhanping Chen, David B. Janes: Vertically integrated SOI circuits for low-power and high-performance applications. IEEE Trans. VLSI Syst. 10(3): 351-362 (2002)
2001
13	EE	James Tschanz, Siva Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De: Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors. ISLPED 2001: 147-152
12	EE	Zhanping Chen, Liqiong Wei, Kaushik Roy: On effective IDDQ testing of low-voltage CMOS circuits using leakage control techniques. IEEE Trans. VLSI Syst. 9(5): 718-725 (2001)
2000
11	EE	Zhanping Chen, Liqiong Wei, Kaushik Roy: On Effective IDDQ Testing of Low Voltage CMOS Circuits Using Leakage Control Techniques. ISQED 2000: 181-188
10	EE	Zhanping Chen, Kaushik Roy, Edwin K. P. Chong: Estimation of power dissipation using a novel power macromodelingtechnique. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1363-1369 (2000)
1999
9	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De: Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications. DAC 1999: 430-435
8	EE	Kaushik Roy, Liqiong Wei, Zhanping Chen: Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications. ISCAS (1) 1999: 366-370
7	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De: Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. VLSI Syst. 7(1): 16-24 (1999)
1998
6	EE	Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De: Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. DAC 1998: 489-494
5	EE	Zhanping Chen, Kaushik Roy: A Power Macromodeling Technique Based on Power Sensitivity. DAC 1998: 678-683
4	EE	Zhanping Chen, Kaushik Roy, Edwin K. P. Chong: Estimation of power sensitivity in sequential circuits with power macromodeling application. ICCAD 1998: 468-472
3	EE	Zhanping Chen, Mark Johnson, Liqiong Wei, Kaushik Roy: Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks. ISLPED 1998: 239-244
2	EE	Zhanping Chen, Kaushik Roy, Tan-Li Chou: Efficient statistical approach to estimate power considering uncertain properties of primary inputs. IEEE Trans. VLSI Syst. 6(3): 484-492 (1998)
1997
1	EE	Zhanping Chen, Kaushik Roy, Tan-Li Chou: Power sensitivity - a new method to estimate power dissipation considering uncertain specifications of primary inputs. ICCAD 1997: 40-44

Coauthor Index

1	Shekhar Y. Borkar (Shekhar Borkar)	[13]
2	Edwin K. P. Chong	[4] [10]
3	Tan-Li Chou	[1] [2]
4	Vivek De	[6] [7] [9] [13]
5	David B. Janes	[14]
6	Mark Johnson	[3] [6]
7	Mark C. Johnson	[7]
8	Ali Keshavarzi	[15]
9	Siva Narendra	[13]
10	Kaushik Roy	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15]
11	Manoj Sachdev	[13]
12	James Tschanz	[13]
13	Liqiong Wei	[3] [6] [7] [8] [9] [11] [12] [14] [15]
14	Yibin Ye	[7] [9]
15	Rongtian Zhang	[14]