| 2001 |
|---|
| 6 | | Seongwon Kim,
Mani Soma:
Test evaluation and data on defect-oriented BIST architecture for high-speed PLL.
ITC 2001: 830-837 |
| 5 | EE | Mani Soma,
Sam D. Huynh,
Jinyan Zhang,
Seongwon Kim,
Giri Devarayanadurg:
Hierarchical ATPG for Analog Circuits and Systems.
IEEE Design & Test of Computers 18(1): 72-81 (2001) |
| 2000 |
|---|
| 4 | EE | Seongwon Kim,
Mani Soma,
Dilip Risbud:
An Effective Defect-Oriented BIST Architecture for High-Speed Phase-Locked Loops.
VTS 2000: 231-236 |
| 1999 |
|---|
| 3 | EE | Sam D. Huynh,
Jinyan Zhang,
Seongwon Kim,
Giri Devarayanadurg,
Mani Soma:
Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems.
Asian Test Symposium 1999: 239- |
| 1998 |
|---|
| 2 | EE | Sam D. Huynh,
Seongwon Kim,
Mani Soma,
Jinyan Zhang:
Dynamic Test Set Generation for Analog Circuits and Systems.
Asian Test Symposium 1998: 360-365 |
| 1 | EE | Sam D. Huynh,
Seongwon Kim,
Mani Soma,
Jinyan Zhang:
Testability analysis and multi-frequency ATPG for analog circuits and systems.
ICCAD 1998: 376-383 |
