2008 | ||
---|---|---|
37 | EE | Jiawei Huang, John Lach: IC Activation and User Authentication for Security-Sensitive Systems. HOST 2008: 76-80 |
36 | EE | Jie Li, John Lach: At-Speed Delay Characterization for IC Authentication and Trojan Horse Detection. HOST 2008: 8-14 |
35 | EE | Liang Di, Mateja Putic, John Lach, Benton H. Calhoun: Power switch characterization for fine-grained dynamic voltage scaling. ICCD 2008: 605-611 |
34 | EE | Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadron, John Lach: Accelerating Compute-Intensive Applications with GPUs and FPGAs. SASP 2008: 101-107 |
2007 | ||
33 | EE | Jie Li, John Lach: Negative-skewed shadow registers for at-speed delay variation characterization. ICCD 2007: 354-359 |
32 | EE | Zhijian Lu, Wei Huang, Mircea R. Stan, Kevin Skadron, John Lach: Interconnect Lifetime Prediction for Reliability-Aware Systems. IEEE Trans. VLSI Syst. 15(2): 159-172 (2007) |
2006 | ||
31 | EE | Zhijian Lu, Yan Zhang, Mircea R. Stan, John Lach, Kevin Skadron: Procrastinating voltage scheduling with discrete frequency sets. DATE 2006: 456-461 |
2005 | ||
30 | John Lach, Gang Qu, Yehea I. Ismail: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005 ACM 2005 | |
29 | EE | Vinu Vijay Kumar, John Lach: Highly flexible multi-mode system synthesis. CODES+ISSS 2005: 27-32 |
28 | EE | Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, Mircea R. Stan: Optimal procrastinating voltage scheduling for hard real-time systems. DAC 2005: 905-908 |
27 | EE | Sivakumar Velusamy, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Monitoring Temperature in FPGA based SoCs. ICCD 2005: 634-640 |
26 | EE | Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Improved Thermal Management with Reliability Banking. IEEE Micro 25(6): 40-49 (2005) |
2004 | ||
25 | David Garrett, John Lach, Charles A. Zukowski: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004 ACM 2004 | |
24 | EE | Vinu Vijay Kumar, Rashi Verma, John Lach, Joanne Bechta Dugan: A Markov Reward Model for Reliable Synchronous Dataflow System Design. DSN 2004: 817-825 |
23 | EE | Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Interconnect lifetime prediction under dynamic stress for reliability-aware design. ICCAD 2004: 327-334 |
22 | EE | John Lach, Jason Brandon, Kevin Skadron: A General Post-Processing Approach to Leakage Current Reduction in SRAM-Based FPGAs. ICCD 2004: 144-150 |
21 | EE | John Lach, Kia Bazargan: Editorial: Special issue on dynamically adaptable embedded systems. ACM Trans. Embedded Comput. Syst. 3(2): 233-236 (2004) |
2003 | ||
20 | EE | Nadine Gergel, Shana Craft, John Lach: Modeling QCA for area minimization in logic synthesis. ACM Great Lakes Symposium on VLSI 2003: 60-63 |
19 | EE | Vinu Vijay Kumar, John Lach: Fine-Grained Self-Healing Hardware for Large-Scale Autonomic Systems. DEXA Workshops 2003: 707-712 |
18 | EE | Vinu Vijay Kumar, John Lach: Heterogeneous Redundancy for Fault and Defect Tolerance with Complexity Independent Area Overhead. DFT 2003: 571- |
17 | EE | Vinu Vijay Kumar, John Lach: Designing, Scheduling, and Allocating Flexible Arithmetic Components. FPL 2003: 1166-1169 |
16 | EE | Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Reducing Multimedia Decode Power using Feedback Control. ICCD 2003: 489- |
15 | Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Alloyed Branch History: Combining Global and Local Branch History for Robust Performance. International Journal of Parallel Programming 31(2): 137-177 (2003) | |
2002 | ||
14 | EE | Zhijian Lu, Jason Hein, Marty Humphrey, Mircea R. Stan, John Lach, Kevin Skadron: Control-theoretic dynamic frequency and voltage scaling for multimedia workloads. CASES 2002: 156-163 |
13 | EE | Yan Zhang, John Lach, Kevin Skadron, Mircea R. Stan: Odd/even bus invert with two-phase transfer for buses with coupling. ISLPED 2002: 80-83 |
2001 | ||
12 | EE | Andrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Constraint-based watermarking techniques for design IP protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001) |
11 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Fingerprinting techniques for field-programmable gate arrayintellectual property protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1253-1261 (2001) |
2000 | ||
10 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Efficient error detection, localization, and correction for FPGA-based debugging. DAC 2000: 207-212 |
1999 | ||
9 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks. DAC 1999: 831-836 |
8 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures. DFT 1999: 386-394 |
7 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Efficient Support of Hardware Debugging Through FPGA Physical Design Partitioning. FPGA 1999: 247 |
6 | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Enhanced Intellectual Property Protection for Digital Circuits on Programmable Hardware. Information Hiding 1999: 286-301 | |
1998 | ||
5 | EE | Andrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Watermarking Techniques for Intellectual Property Protection. DAC 1998: 776-781 |
4 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Efficiently Supporting Fault-Tolerance in FPGAs. FPGA 1998: 105-115 |
3 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Signature hiding techniques for FPGA intellectual property protection. ICCAD 1998: 186-189 |
2 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Fingerprinting Digital Circuits on Programmable Hardware. Information Hiding 1998: 16-31 |
1 | EE | John Lach, William H. Mangione-Smith, Miodrag Potkonjak: Low overhead fault-tolerant FPGA systems. IEEE Trans. VLSI Syst. 6(2): 212-221 (1998) |