| 2006 | 
|---|
| 12 | EE | Ron Wilson,
David Overhauser:
Who is really responsible for quality throughout the design process?.
ISQED 2006: 507 | 
| 2002 | 
|---|
| 11 | EE | K. Brock,
C. Edwards,
R. Lannoo,
Ulf Schlichtmann,
Antun Domic,
Jacques Benkoski,
David Overhauser,
M. Kliment:
Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs.
DATE 2002: 538-539 | 
| 2000 | 
|---|
| 10 | EE | N. S. Nagaraj,
Andrzej J. Strojwas,
Sani R. Nassif,
Ray Hokinson,
Tak Young,
Wonjae L. Kang,
David Overhauser,
Sung-Mo Kang:
When bad things happen to good chips (panel session).
DAC 2000: 736-737 | 
| 9 | EE | Resve A. Saleh,
Syed Zakir Hussain,
Steffen Rochel,
David Overhauser:
Clock skew verification in the presence of IR-drop in the powerdistribution network.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(6): 635-644 (2000) | 
| 1998 | 
|---|
| 8 | EE | Gregory Steele,
David Overhauser,
Steffen Rochel,
Syed Zakir Hussain:
Full-Chip Verification Methods for DSM Power Distribution Systems.
DAC 1998: 744-749 | 
| 7 | EE | Resve A. Saleh,
David Overhauser,
Sandy Taylor:
Full-chip verification of UDSM designs.
ICCAD 1998: 453-460 | 
| 6 | EE | Michael Benoit,
Sandy Taylor,
David Overhauser,
Steffen Rochel:
Power distribution in high-performance design.
ISLPED 1998: 274-278 | 
| 1995 | 
|---|
| 5 |  | Kai-Ti Huang,
David Overhauser:
A Novel Graph Algorithm for Circuit Recognition.
ISCAS 1995: 1695-1698 | 
| 4 |  | Jeong-Taek Kong,
David Overhauser:
Combining RC-Interconnect Effects with Nonlinear MOS Macromodels.
ISCAS 1995: 570-573 | 
| 3 |  | Jeong-Taek Kong,
Syed Zakir Hussain,
David Overhauser:
Improving Digital MOS Macromodel Accuracy.
ISCAS 1995: 578-581 | 
| 2 |  | Syed Zakir Hussain,
David Overhauser:
Automatic Dynamic Mixed-Mode Simulation Through Network Reconfiguration.
ISCAS 1995: 582-584 | 
| 1 | EE | Jeong-Taek Kong,
David Overhauser:
Methods to improve digital MOS macromodel accuracy.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 868-881 (1995) |