| 2008 |
|---|
| 10 | EE | Kazuhiro Nakamura,
Masatoshi Yamamoto,
Kazuyoshi Takagi,
Naofumi Takagi:
Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems.
ISCAS 2008: 1688-1691 |
| 2007 |
|---|
| 9 | EE | Shigeo Shioda,
Kazuhiro Nakamura:
Scale-Free Property of Directed Networks with Two Intrinsic Node Weights.
GLOBECOM 2007: 532-537 |
| 2004 |
|---|
| 8 | EE | Satoshi Yamane,
Kazuhiro Nakamura:
Development and evaluation of symbolic model checker based on approximation for real-time systems.
Systems and Computers in Japan 35(10): 83-101 (2004) |
| 2001 |
|---|
| 7 | EE | Kazuhiro Nakamura,
Qiang Zhu,
Shinji Maruoka,
Takashi Horiyama,
Shinji Kimura,
Katsumasa Watanabe:
A real-time 64-monosyllable recognition LSI with learning mechanism.
ASP-DAC 2001: 31-32 |
| 6 | EE | Kazuhiro Nakamura,
Qiang Zhu,
Shinji Maruoka,
Takashi Horiyama,
Shinji Kimura,
Katsumasa Watanabe:
Speech recognition chip for monosyllables.
ASP-DAC 2001: 396-399 |
| 2000 |
|---|
| 5 | EE | Kazuhiro Nakamura,
Shinji Maruoka,
Shinji Kimura,
Katsumasa Watanabe:
Multi-clock path analysis using propositional satisfiability.
ASP-DAC 2000: 81-86 |
| 1998 |
|---|
| 4 | EE | Kazuhiro Nakamura,
Satoshi Yamane:
Formal Verification of Real-Time Software by Symbolic Model-Checker.
ACSD 1998: 99-108 |
| 3 | EE | Kazuhiro Nakamura,
Kazuyoshi Takagi,
Shinji Kimura,
Katsumasa Watanabe:
Waiting false path analysis of sequential logic circuits for performance optimization.
ICCAD 1998: 392-395 |
| 1997 |
|---|
| 2 | | Satoshi Yamane,
Kazuhiro Nakamura:
Symbolic Model-Checking Method Based on Approximations and Binary Decision Diagrams for Real-Time Systems.
TACS 1997: 562-582 |
| 1 | EE | Kazuhiro Nakamura,
Yoshiyuki Aono,
Yoshiaki Tadokoro:
A walking navigation system for the blind.
Systems and Computers in Japan 28(13): 36-45 (1997) |
