| 2009 |
| 43 | EE | Stephen Friedman,
Allan Carroll,
Brian Van Essen,
Benjamin Ylvisaker,
Carl Ebeling,
Scott Hauck:
SPR: an architecture-adaptive CGRA mapping tool.
FPGA 2009: 191-200 |
| 2006 |
| 42 | EE | Carl Ebeling:
Configurable Computing Platforms - Promises, Promises.
ASAP 2006: 3-4 |
| 41 | EE | Benjamin Ylvisaker,
Brian Van Essen,
Carl Ebeling:
A Type Architecture for Hybrid Micro-Parallel Computers.
FCCM 2006: 99-110 |
| 40 | EE | Benjamin Ylvisaker,
Brian Van Essen,
Carl Ebeling:
A type architecture for hybrid micro-parallel computers.
FPGA 2006: 227 |
| 39 | EE | Allan Carroll,
Carl Ebeling:
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding.
FPL 2006: 1-6 |
| 38 | EE | Akshay Sharma,
Carl Ebeling,
Scott Hauck:
PipeRoute: a pipelining-aware router for reconfigurable architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 518-532 (2006) |
| 2005 |
| 37 | EE | Akshay Sharma,
Carl Ebeling,
Scott Hauck:
Architecture Adaptive Routability-Driven Placement for FPGAs (abstract only).
FPGA 2005: 266 |
| 36 | | Akshay Sharma,
Carl Ebeling,
Scott Hauck:
Architecture-Adaptive Routability-Driven Placement for FPGAs.
FPL 2005: 427-432 |
| 2004 |
| 35 | EE | Akshay Sharma,
Katherine Compton,
Carl Ebeling,
Scott Hauck:
Exploration of pipelined FPGA interconnect structures.
FPGA 2004: 13-22 |
| 34 | EE | John F. Keane,
Christopher Bradley,
Carl Ebeling:
A compiled accelerator for biological cell signaling simulations.
FPGA 2004: 233-241 |
| 33 | EE | Carl Ebeling,
Chris Fisher,
Guanbin Xing,
Manyuan Shen,
Hui Liu:
Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture.
IEEE Trans. Computers 53(11): 1436-1448 (2004) |
| 2003 |
| 32 | EE | Akshay Sharma,
Carl Ebeling,
Scott Hauck:
PipeRoute: a pipelining-aware router for FPGAs.
FPGA 2003: 68-77 |
| 31 | EE | Carl Ebeling,
Chris Fisher,
Guanbin Xing,
Manyuan Shen,
Hui Liu:
Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture.
FPL 2003: 21-30 |
| 2001 |
| 30 | EE | Chris Fisher,
Kevin Rennie,
Guanbin Xing,
Stefan G. Berg,
Kevin Bolding,
John H. Naegle,
Daniel Parshall,
Dmitriy Portnov,
Adnan Sulejmanpasic,
Carl Ebeling:
An Emulator for Exploring RaPiD Configurable Computing Architectures.
FPL 2001: 17-26 |
| 2000 |
| 29 | EE | Pak K. Chan,
Martine D. F. Schlag,
Carl Ebeling,
Larry McMurchie:
Distributed-memory parallel routing for field-programmable gatearrays.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 850-862 (2000) |
| 1999 |
| 28 | EE | Darren C. Cronquist,
Chris Fisher,
Miguel Figueroa,
Paul Franklin,
Carl Ebeling:
Architecture Design of Reconfigurable Pipelined Datapaths.
ARVLSI 1999: 23-41 |
| 1998 |
| 27 | EE | Darren C. Cronquist,
Paul Franklin,
Stefan G. Berg,
Carl Ebeling:
Specifying and Compiling Applications for RaPiD.
FCCM 1998: 116-125 |
| 26 | EE | Soha Hassoun,
Carl Ebeling:
Using precomputation in architecture and logic resynthesis.
ICCAD 1998: 316-323 |
| 25 | EE | Scott Hauck,
Gaetano Borriello,
Carl Ebeling:
Mesh routing topologies for multi-FPGA systems.
IEEE Trans. VLSI Syst. 6(3): 400-408 (1998) |
| 1997 |
| 24 | EE | Carl Ebeling,
Darren C. Cronquist,
Paul Franklin:
Configurable computing: the catalyst for high-performance architectures.
ASAP 1997: 364-373 |
| 23 | EE | Carl Ebeling,
Darren C. Cronquist,
Paul Franklin,
Jason Secosky,
Stefan G. Berg:
Mapping applications to the RaPiD configurable architecture.
FCCM 1997: 106-115 |
| 22 | EE | Carl Ebeling:
Whither Configurable Computing?
HICSS (1) 1997: 713 |
| 21 | EE | Neil R. McKenzie,
Kevin Bolding,
Carl Ebeling,
Lawrence Snyder:
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing.
PCRCW 1997: 247-260 |
| 20 | | William H. Mangione-Smith,
Brad Hutchins,
David L. Andrews,
André DeHon,
Carl Ebeling,
Reiner W. Hartenstein,
Oskar Mencer,
John Morris,
Krishna V. Palem,
Viktor K. Prasanna,
Henk A. E. Spaanenburg:
Seeking Solutions in Configurable Computing.
IEEE Computer 30(12): 38-43 (1997) |
| 1996 |
| 19 | EE | Soha Hassoun,
Carl Ebeling:
Architectural Retiming: Pipelining Latency-Constrained Circuts.
DAC 1996: 708-713 |
| 18 | | Carl Ebeling,
Darren C. Cronquist,
Paul Franklin:
RaPiD - Reconfigurable Pipelined Datapath.
FPL 1996: 126-135 |
| 1995 |
| 17 | EE | Carl Ebeling,
Brian Lockyear:
On the performance of level-clocked circuits.
ARVLSI 1995: 342-357 |
| 16 | EE | Larry McMurchie,
Carl Ebeling:
PathFinder: A Negotiation-based Performance-driven Router for FPGAs.
FPGA 1995: 111-117 |
| 15 | EE | Carl Ebeling,
Larry McMurchie,
Scott Hauck,
Steven M. Burns:
Placement and routing tools for the Triptych FPGA.
IEEE Trans. VLSI Syst. 3(4): 473-482 (1995) |
| 14 | EE | Gaetano Borriello,
Carl Ebeling,
Scott Hauck,
Steven M. Burns:
The Triptych FPGA architecture.
IEEE Trans. VLSI Syst. 3(4): 491-501 (1995) |
| 1994 |
| 13 | | Scott Hauck,
Gaetano Borriello,
Carl Ebeling:
Mesh Routing Topologies for Multi-FPGA Systems.
ICCD 1994: 170-177 |
| 12 | | Neil R. McKenzie,
Kevin Bolding,
Carl Ebeling,
Lawrence Snyder:
CRANIUM: An Interface for Message Passing on Adaptive Packet Routing Networks.
PCRCW 1994: 266-280 |
| 11 | | Scott Hauck,
Steven M. Burns,
Gaetano Borriello,
Carl Ebeling:
An FPGA for Implementing Asynchronous Circuits.
IEEE Design & Test of Computers 11(3): 60-69 (1994) |
| 10 | EE | Brian Lockyear,
Carl Ebeling:
Optimal retiming of level-clocked circuits using symmetric clock schedules.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(9): 1097-1109 (1994) |
| 1993 |
| 9 | EE | Miles Ohlrich,
Carl Ebeling,
Eka Ginting,
Lisa Sather:
SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm.
DAC 1993: 31-37 |
| 8 | EE | Brian Lockyear,
Carl Ebeling:
The practical application of retiming to the design of high-performance systems.
ICCAD 1993: 288-295 |
| 7 | | Kevin Bolding,
Sen-Ching Cheung,
Sung-Eun Choi,
Carl Ebeling,
Soha Hassoun,
Ton Anh Ngo,
Robert Wille:
The chaos router chip: design and implementation of an adaptive router.
VLSI 1993: 311-320 |
| 1992 |
| 6 | | Scott Hauck,
Gaetano Borriello,
Steven M. Burns,
Carl Ebeling:
MONTAGNE: An FPL for Synchronous and Asynchronous Circuits.
FPL 1992: 44-51 |
| 1990 |
| 5 | | Hans J. Berliner,
Gordon Goetsch,
Murray Campbell,
Carl Ebeling:
Measuring the Performance Potential of Chess Programs.
Artif. Intell. 43(1): 7-20 (1990) |
| 1989 |
| 4 | | Hans J. Berliner,
Carl Ebeling:
Pattern Knowledge and Search: The SUPREM Architecture.
Artif. Intell. 38(2): 161-198 (1989) |
| 3 | | Tony DeRose,
Mary L. Bailey,
Bill Barnard,
Robert Cypher,
David Dobrikin,
Carl Ebeling,
Smaragda Konstantinidou,
Larry McMurchie,
Haim Mizrahi,
Bill Yost:
Apex: two architectures for generating parametric curves and surfaces.
The Visual Computer 5(5): 264-276 (1989) |
| 1986 |
| 2 | | Hans J. Berliner,
Carl Ebeling:
The SUPREM Architecture: A New Intelligent Paradigm.
Artif. Intell. 28(1): 3-8 (1986) |
| 1984 |
| 1 | | Carl Ebeling,
Andrew J. Palay:
The Design and Implementation of a VLSI Chess Move Generator.
ISCA 1984: 74-80 |