Emrah Acar

2007
17	EE	Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214
16	EE	Peng Li, Zhuo Feng, Emrah Acar: Characterizing Multistage Nonlinear Drivers and Variability for Accurate Timing and Noise Analysis. IEEE Trans. VLSI Syst. 15(11): 1205-1214 (2007)
2006
15	EE	Emrah Acar, Kanak Agarwal, Sani R. Nassif: Characterization of total chip leakage using inverse (reciprocal) gamma distribution. ISCAS 2006
14	EE	Sani R. Nassif, Kanak Agarwal, Emrah Acar: Methods for estimating decoupling capacitance of nonswitching circuit blocks. ISCAS 2006
13	EE	Emrah Acar, Peter Feldmann: Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). ISCAS 2006
2005
12	EE	Peng Li, Emrah Acar: A Waveform Independent Gate Model for Accurate Timing Analysis. ICCD 2005: 363-365
11	EE	Emrah Acar, Anirudh Devgan, Sani R. Nassif: Leakage and Leakage Sensitivity Computation for Combinational Circuits. J. Low Power Electronics 1(2): 172-181 (2005)
2003
10	EE	Haihua Su, Emrah Acar, Sani R. Nassif: Power grid reduction based on algebraic multigrid principles. DAC 2003: 109-112
9	EE	Haihua Su, Frank Liu, Anirudh Devgan, Emrah Acar, Sani R. Nassif: Full chip leakage estimation considering power supply and temperature variations. ISLPED 2003: 78-83
8	EE	Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns: Leakage and leakage sensitivity computation for combinational circuits. ISLPED 2003: 96-99
7	EE	Ravishankar Arunachalam, Emrah Acar, Sani R. Nassif: Optimal shielding/spacing metrics for low power design. ISVLSI 2003: 167-172
2002
6	EE	Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi: A Linear-Centric Simulation Framework for Parametric Fluctuations. DATE 2002: 568-575
5	EE	Emrah Acar, Sani R. Nassif, Ying Liu, Lawrence T. Pileggi: Time-Domain Simulation of Variational Interconnect Models. ISQED 2002: 419-424
4	EE	Emrah Acar, Florentin Dartu, Lawrence T. Pileggi: TETA: transistor-level waveform evaluation for timing analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 605-616 (2002)
2001
3	EE	Emrah Acar, Lawrence T. Pileggi, Sani R. Nassif, Ying Liu: Assessment of True Worst Case Circuit Performance Under Interconnect Parameter Variations. ISQED 2001: 431-436
1999
2	EE	Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi: S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. Great Lakes Symposium on VLSI 1999: 60-63
1998
1	EE	Tao Lin, Emrah Acar, Lawrence T. Pileggi: h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response. ICCAD 1998: 19-25

Coauthor Index

1	Kanak Agarwal	[14] [15]
2	Ravishankar Arunachalam	[7]
3	Reinaldo A. Bergamaschi	[17]
4	Pradip Bose	[17]
5	Jeffrey L. Burns	[8]
6	Alper Buyuktosunoglu	[17]
7	Mustafa Celik	[2]
8	John A. Darringer	[17]
9	Florentin Dartu	[4]
10	Anirudh Devgan	[8] [9] [11]
11	Nagu R. Dhanwada	[17]
12	Gero Dittmann	[17]
13	Peter Feldmann	[13]
14	Zhuo Feng	[16]
15	Guoling Han	[17]
16	Geert Janssen	[17]
17	Dorothy Kucar	[17]
18	Peng Li	[12] [16]
19	Tao Lin	[1]
20	Frank Liu	[9]
21	Ying Liu	[3] [5] [8]
22	Indira Nair	[17]
23	Gi-Joon Nam	[17]
24	Sani R. Nassif	[3] [5] [6] [7] [8] [9] [10] [11] [14] [15]
25	Altan Odabasioglu	[2]
26	Hiren D. Patel	[17]
27	Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage)	[1] [2] [3] [4] [5] [6]
28	Rahul M. Rao	[8]
29	Haihua Su	[8] [9] [10]