Lisa M. Guerra

2000
14	EE	Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra: Cut-based functional debugging for programmable systems-on-chip. IEEE Trans. VLSI Syst. 8(1): 40-51 (2000)
1999
13	EE	Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic: Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification. DAC 1999: 964-969
12	EE	Inki Hong, Miodrag Potkonjak, Lisa M. Guerra: Throughput optimization of general non-linear computations. ICCAD 1999: 406-409
11	EE	Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra: Improving the observability and controllability of datapaths foremulation-based debugging. IEEE Trans. on CAD of Integrated Circuits and Systems 18(11): 1529-1541 (1999)
1998
10	EE	Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: A Methodology for Guided Behavioral-Level Optimization. DAC 1998: 309-314
9	EE	Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra: Functional debugging of systems-on-chip. ICCAD 1998: 525-528
8	EE	Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's. IEEE Trans. VLSI Syst. 6(1): 158-167 (1998)
1996
7	EE	Yosinori Watanabe, Lisa M. Guerra, Robert K. Brayton: Permissible functions for multioutput components in combinational logic optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 732-744 (1996)
6	EE	Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: Performance optimization using template mapping for datapath-intensive high-level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(8): 877-888 (1996)
5	EE	Renu Mehra, Lisa M. Guerra, Jan M. Rabaey: Low-power architectural synthesis and the impact of exploiting locality. VLSI Signal Processing 13(2-3): 239-258 (1996)
1993
4		Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: High Level Synthesis Techniques for Efficient Built-In-Self Repair. DFT 1993: 41-48
3	EE	Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: High level synthesis for reconfigurable datapath structures. ICCAD 1993: 26-29
2	EE	Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey: Instruction set mapping for performance optimization. ICCAD 1993: 518-521
1		Yosinori Watanabe, Lisa M. Guerra, Robert K. Brayton: Logic Optimization with Multi-Output Gates. ICCD 1993: 416-420

Coauthor Index

1	Robert K. Brayton	[1] [7]
2	Miguel R. Corazao	[2] [6]
3	Joachim Fitzner	[13]
4	Inki Hong	[12]
5	Marwan A. Khalaf	[2] [6]
6	Darko Kirovski	[9] [11] [14]
7	Renu Mehra	[5]
8	Miodrag Potkonjak	[2] [3] [4] [6] [8] [9] [10] [11] [12] [14]
9	Jan M. Rabaey	[2] [3] [4] [5] [6] [8] [10]
10	Chris Schläger	[13]
11	Bassam Tabbara	[13]
12	Dipankar Talukdar	[13]
13	Yosinori Watanabe	[1] [7]
14	Vojin Zivojnovic	[13]

Colors in the list of coauthors