Amit Narayan

2006
18	EE	J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan, A. Agarwal: Estimating and reducing the memory requirements of signal processing codes for embedded systems. IEEE Transactions on Signal Processing 54(1): 286-294 (2006)
2005
17		Amit Mehrotra, Suihua Lu, David C. Lee, Amit Narayan: Steady-state analysis of voltage and current controlled oscillators. ICCAD 2005: 618-623
2004
16	EE	Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain, Christian Stangier, Amit Narayan, David L. Dill, E. Allen Emerson: A Partitioning Methodology for BDD-Based Verification. FMCAD 2004: 399-413
15		Makram M. Mansour, Amit Mehrotra, William W. Walker, Amit Narayan: Analysis techniques for obtaining the steady-state solution of MOS LC oscillators. ISCAS (5) 2004: 512-515
14		Suihua Lu, Amit Narayan, Amit Mehrotra: Continuation method in multitone harmonic balance. ISCAS (5) 2004: 520-523
2003
13	EE	Subramanian K. Iyer, Debashis Sahoo, Christian Stangier, Amit Narayan, Jawahar Jain: Improved Symbolic Verification Using Partitioning Techniques. CHARME 2003: 410-424
2001
12	EE	J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan: Reducing Memory Requirements of Nested Loops for Embedded Systems. DAC 2001: 359-364
1998
11	EE	Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Wireplanning in logic synthesis. ICCAD 1998: 26-33
1997
10	EE	Amit Narayan, Adrian J. Isles, Jawahar Jain, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Reachability analysis using partitioned-ROBDDs. ICCAD 1997: 388-393
9	EE	Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Logic synthesis for large pass transistor circuits. ICCAD 1997: 663-670
8		Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli: A Survey of Techniques for Formal Verification of Combinational Circuits. ICCD 1997: 445-454
7	EE	Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli: Formal Verification of Combinational Circuit. VLSI Design 1997: 218-225
1996
6	EE	Sunil P. Khatri, Amit Narayan, Sriram C. Krishnan, Kenneth L. McMillan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Engineering Change in a Non-Deterministic FSM Setting. DAC 1996: 451-456
5		Jawahar Jain, Amit Narayan, C. Coelho, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Masahiro Fujita: Decomposition Techniques for Efficient ROBDD Construction. FMCAD 1996: 419-434
4	EE	Amit Narayan, Jawahar Jain, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli: Partitioned ROBDDs - a compact, canonical and efficiently manipulable representation for Boolean functions. ICCAD 1996: 547-554
3	EE	Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masahiro Fujita, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: A study of composition schemes for mixed apply/compose based construction of ROBDDs. VLSI Design 1996: 249-253
1995
2		J. Ramanujam, Amit Narayan: Integrating Data Distribution and Loop Transformations. PPSC 1995: 668-673
1994
1	EE	Eric Felt, Amit Narayan, Alberto L. Sangiovanni-Vincentelli: Measurement and modeling of MOS transistor current mismatch in analog IC's. ICCAD 1994: 272-277

Coauthor Index

1	A. Agarwal	[18]
2	Robert K. Brayton	[3] [5] [6] [10] [11]
3	Premal Buch	[9]
4	C. Coelho	[5]
5	David L. Dill	[16]
6	E. Allen Emerson	[16]
7	Eric Felt	[1]
8	Masahiro Fujita	[3] [4] [5] [7] [8]
9	Wilsin Gosti	[11]
10	Jinpyo Hong	[12] [18]
11	Adrian J. Isles	[10]
12	Subramanian K. Iyer	[13] [16]
13	Jawahar Jain	[3] [4] [5] [7] [8] [10] [13] [16]
14	Mahmut T. Kandemir	[12] [18]
15	Sunil P. Khatri	[3] [5] [6]
16	Sriram C. Krishnan	[6]
17	David C. Lee	[17]
18	Suihua Lu	[14] [17]
19	Makram M. Mansour	[15]
20	Kenneth L. McMillan	[6]
21	Amit Mehrotra	[14] [15] [17]
22	A. Richard Newton	[9]
23	J. Ramanujam	[2] [12] [18]
24	Debashis Sahoo	[13] [16]
25	Alberto L. Sangiovanni-Vincentelli	[1] [3] [4] [5] [6] [7] [8] [9] [10] [11]
26	Christian Stangier	[13] [16]
27	William W. Walker	[15]

Colors in the list of coauthors