DFT 2000:
Mt. Fuji,
Yamanashi,
Japan
15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings.
IEEE Computer Society 2000, ISBN 0-7695-0719-0 BibTeX
@proceedings{DBLP:conf/dft/2000,
title = {15th IEEE International Symposium on Defect and Fault-Tolerance
in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan,
Proceedings},
booktitle = {DFT},
publisher = {IEEE Computer Society},
year = {2000},
isbn = {0-7695-0719-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Yield Analysis and Modeling
Yield Enhancement Techniques
Wafer Scale/Large Area Systems
- Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim:
A High Speed and High Fault Tolerant Reconfigurable Reasoning System: Toward a Wafer Scale Reconfigurable Reasoning LSI.
69-77
Electronic Edition (IEEE Computer Society DL) BibTeX
- Markus Rudack, Michael Redeker, Dieter Treytnar, Ole Mende, Klaus Herrmann:
Self-Configuration of a Large Area Integrated Multiprocessor System for Video Applications.
78-86
Electronic Edition (IEEE Computer Society DL) BibTeX
- R. M. Lea, P. T. Tetnowski, M. Covic:
A Reconfigurable WSI Massively Data-Parallel Processing Device for Cost-Effective 3D Sensor Data Processing.
87-95
Electronic Edition (IEEE Computer Society DL) BibTeX
- Xiaohong Jiang, Susumu Horiguchi:
Optimization of Wafer Scale H-Tree Clock Distribution Network Based on a New Statistical Skew Model.
96-104
Electronic Edition (IEEE Computer Society DL) BibTeX
- Klaus Herrmann, Sören Moch, Jörg Hilgenstock, Peter Pirsch:
Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit.
105-113
Electronic Edition (IEEE Computer Society DL) BibTeX
- Ole Mende, Michael Redeker, Markus Rudack, Dieter Treytnar:
A Multifunctional Laser Linking and Cutting Structure for Standard 0.25 mum CMOS-Technology.
114-
Electronic Edition (IEEE Computer Society DL) BibTeX
Fault-Tolerant Interconnections
Fault-Tolerant Systems
Error Coding
Reconfiguration and Repair
Online Testing
Built-In Self-Test
- Gert Jervan, Zebo Peng, Raimund Ubar:
Test Cost Minimization for Hybrid Bist.
283-291
Electronic Edition (IEEE Computer Society DL) BibTeX
- G. Biasoli, Fabrizio Ferrandi, Donatella Sciuto, Alessandro Fin, Franco Fummi:
BIST Architectures Selection Based on Behavioral Testing.
292-298
Electronic Edition (IEEE Computer Society DL) BibTeX
- Chuang Cheng, Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu, Chen-Jong Wey, Ming-Chang Tsai:
BRAINS: A BIST Compiler for Embedded Memories.
299-
Electronic Edition (IEEE Computer Society DL) BibTeX
Testing Strategies
IDDQ Testing
Fault Injection
Copyright © Sat May 16 23:06:35 2009
by Michael Ley (ley@uni-trier.de)