| 1998 |
|---|
| 8 | EE | Alessandro Balboni,
Claudio Costi,
Massimo Pellencin,
Andrea Quadrini,
Donatella Sciuto:
Clock skew reduction in ASIC logic design: a methodology for clock tree management.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 344-356 (1998) |
| 1996 |
|---|
| 7 | EE | Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow.
CODES 1996: 62-69 |
| 6 | | Alessandro Balboni,
Loris Valenti:
ASIC Design and FPGA Design: A Unified Design Methodology Applied to Different Technologies.
FPL 1996: 356-360 |
| 5 | EE | Alessandro Balboni,
William Fornaciari,
M. Vincenzi,
Donatella Sciuto:
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems.
ISSS 1996: 77-82 |
| 1994 |
|---|
| 4 | EE | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
A methodology for control-dominated systems codesign.
CODES 1994: 2-9 |
| 3 | | Alessandro Balboni,
Claudio Costi,
Franco Fummi,
Donatella Sciuto:
From Behavioral Description to Systolic Array Based Architectures.
EDAC-ETC-EUROASIC 1994: 657 |
| 2 | EE | Donatella Sciuto,
Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari:
The role of VHDL within the TOSCA hardware/software codesign framework.
EURO-DAC 1994: 612-617 |
| 1 | | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
HW/SW Codesign for Embedded Telecom Systems.
ICCD 1994: 278-281 |
