7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA.
IEEE Computer Society 1997, ISBN 0-8186-7904-2 BibTeX
@proceedings{DBLP:conf/glvlsi/1997,
title = {7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March
1997, Urbana, IL, USA},
booktitle = {Great Lakes Symposium on VLSI},
publisher = {IEEE Computer Society},
year = {1997},
isbn = {0-8186-7904-2},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Physical Design
Testing I
Synthesis and Verification
High-Level Design Methodologies
Low-Power Design
VLSI Architecture I
- Fabio Ancona, Giorgio Oddone, Stefano Rovetta, Gianni Uneddu, Rodolfo Zunino:
VLSI Architectures for Programmable Sorting of Analog Quantities with Multiple-Chip Support.
94-99
Electronic Edition (link) BibTeX
- Sam S. Appleton, Shannon V. Morton, Michael J. Liebelt:
A new method for asynchronous pipeline control.
100-104
Electronic Edition (link) BibTeX
- Kevin P. Acken, Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
The MGAP Family of Processor Arrays.
105-
Electronic Edition (link) BibTeX
Testing II
Applications
High-Level Synthesis
VLSI Architecture II
- Sergio D'Angelo, Lauro Mantoani, Riccardo P. G. Mazzei, Stefania Russo, Giacomo R. Sechi:
Modular Design of Communication Node Prototypes.
170-175
Electronic Edition (link) BibTeX
- Fabio Ancona, Alessandro De Gloria, Rodolfo Zunino:
Parallel VLSI Architectures for Cryptographic Systems.
176-181
Electronic Edition (link) BibTeX
- Eric Gayles, Kevin P. Acken, Robert Michael Owens, Mary Jane Irwin:
A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines.
182-
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:13:52 2009
by Michael Ley (ley@uni-trier.de)
