Volume 11,
Number 1,
February 2002
- Giuseppe Grassi, Saverio Mascolo:
A Systematic Procedure for Synchronizing Hyperchaos Via Observer Design.
1-16
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- Thambipillai Srikanthan, Bimal Gisuthan:
Optimizing Scaling Factor Computations in Flat Cordic.
17-34
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- Hirotaka Koizumi, Iwao Sasase, Shinsaku Mori:
Analysis of Class D-E Resonant dc/dc Converter Using Thinned-Out Method.
35-50
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- Robert C. Chang, L.-C. Hsu, M.-C. Sun:
A Low-Power and High-Speed D Flip-Flop Using a Single Latch.
51-56
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- Aristodemos Pnevmatikakis, Lampros Dermentzoglou, Aggeliki Arapoyanni:
Analog-to-Digital Interface for Heterodyne Receivers.
57-72
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- Shaohua Tang:
Correlative Message Group Digital Signature and Its Application to E-Commerce.
73-80
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- Torsten Lehmann, Marco Cassia:
1 V OTA Using Current Driven Bulk Circuits.
81-92
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- Hong Rui Jiang, Kyung Sup Kwak:
On Modified Complex Recurrent Neural Network Adaptive Equalizer.
93-
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Volume 11,
Number 2,
April 2002
Special Section for APCCAS 2000
Regular Papers
Volume 11,
Number 3,
June 2002
- Abdhesh K. Singh, Raj Senani:
A New Four-CC-Based Configuration for Realizing a Voltage-Mode Biquad Filter.
213-218
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- J. Lee, Khaled Hayatleh, F. J. Lidgey, J. Drew:
Linear Bi-CMOS Transconductance for Gm-C Filter Applications.
219-230
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- Dimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, V. Adler, F. Baez, Eby G. Friedman:
Demonstration of Speed and Power Enhancements on an Industrial Circuit Through Application of Clock Skew Scheduling.
231-246
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- Saif Zahir, Rabab K. Ward:
A New Edge Preserving Binary Images Resizing Technique.
247-258
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- Yoonseo Choi, Taewhan Kim:
Binding Algorithm for Power Optimization Based on Network Flow Method.
259-272
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- Tibor Csöndes, Balázs Kotnyek:
Greedy Algorithms for the Test Selection Problem in Protocol Conformance Testing.
273-282
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- Javad Haddadnia, Karim Faez, Majid Ahmadi:
A Neural Based Human Face Recognition System Using an Efficient Feature Extraction Method with Pseudo Zernike Moment.
283-304
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- Yehea I. Ismail, Eby G. Friedman, José Luis Neves:
Inductance Effects in RLC Trees.
305-
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Volume 11,
Number 4,
August 2002
- Ankur Srivastava, Eren Kursun, Majid Sarrafzadeh:
Predictability in RT-Level Designs.
323-332
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- Heng-Liang Huang, Jing-Yang Jou:
Bootstrap Monte Carlo with Adaptive Stratification for Power Estimation.
333-350
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- Wei-Chung Cheng, Massoud Pedram:
Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System.
351-364
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- Yi-Jong Yeh, Sy-Yen Kuo:
An Optimization-Based Multiple-Voltage Scaling Technique for Low-Power CMOS Digital Design.
365-376
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- Cheng-Hsien Chen, Chen-Yi Lee:
Reduce the Memory Bandwidth of 3D Graphics Hardware with a Novel Rasterizer.
377-392
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- Hongchin Lin, Nai-Hsien Chen, Jainhao Lu:
Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories.
393-404
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- Jiun-In Guo, Chien-Chang Lin, Chih-Da Chien:
A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths.
405-428
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- Chih-Wen Lu:
Low-Power High-Speed Class-AB Buffer Amplifiers for Liquid-Crystal Display Signal Driver Application.
427-
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Volume 11,
Number 5,
October 2002
- Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
A Class of Irredundant Encoding Techniques for Reducing Bus Power.
445-458
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- Frank Vahid, Tony Givargis, Susan Cotterell:
Power Estimator Development for Embedded System Memory Tuning.
459-476
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- Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto:
The Impact of Source Code Transformations on Software Power and Energy Consumption.
477-502
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- Paul Marchal, Murali Jayapala, Samuel Xavier de Souza, Peng Yang, Francky Catthoor, Geert Deconinck:
Matador: An Exploration Environment for System-Design.
503-536
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- Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne Wolf:
Using Memory Compression for Energy Reduction in an Embedded Java System.
537-556
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- Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak:
Code Coverage-Based Power Estimation Techniques for Microprocessors.
557-
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Volume 11,
Number 6,
December 2002
- Radu Marculescu:
Guest Editorial: Power Modeling, Estimation and Optimization in VLSI Systems.
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- Kaushik Roy, Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand:
Leakage Current in Deep-Submicron CMOS Circuits.
575-600
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- Seongsoo Lee, Seungjun Lee, Takayasu Sakurai:
Energy-Constrained VDD Hopping Scheme with Run-Time Power Estimation for Low-Power Real-Time VLSI Systems.
601-620
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- David Blaauw, Steven M. Martin, Trevor N. Mudge, Krisztián Flautner:
Leakage Current Reduction in VLSI Systems.
621-636
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- Paul-Peter Sotiriadis, Anantha Chandrakasan:
Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures.
637-658
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- George Cai, Ashutosh S. Dhodapkar, James E. Smith:
Integrated Performance, Power, and Thermal Modeling.
659-
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Copyright © Sun May 17 00:08:01 2009
by Michael Ley (ley@uni-trier.de)
