Integration, Volume 23

Volume 23, Number 1, October 1997

• R. Moreno, Román Hermida, Milagros Fernández, Hortensia Mecha:
  A unified approach for scheduling and allocation. 1-35
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• Salil Raje, Majid Sarrafzadeh:
  Scheduling with multiple voltages. 37-59
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• F. Y. Young, D. F. Wong:
  How good are slicing floorplans? 61-73
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• Franco Fummi, Donatella Sciuto:
  A complete testing strategy based on interacting and hierarchical FSMs. 75-93
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• Jack P. F. Glas:
  An embedded CDMA-receiver A design example. 95-111
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Volume 23, Number 2, November 1997

• Michael Braun, Guy Even, Thomas Walle:
  Mirroring: a technique for pipelining semi-systolic and systolic arrays. 115-130
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• C. A. J. van Eijk:
  A BDD-based verification method for large synthesized circuits. 131-149
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• Joseph L. Ganley:
  Accuracy and fidelity of fast net length estimates. 151-155
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• Shung-Chih Chen, Jer-Min Jou:
  Serial diagnostic fault simulation for synchronous sequential circuits. 157-170
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• Kenneth J. Schultz:
  Content-addressable memory core cells A survey. 171-188
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