EURO-DAC 1994:
Grenoble,
France
Jean Mermet (Ed.):
Proceedings EURO-DAC'94, European Design Automation Conference, Grenoble, France, September 19-22, 1994.
IEEE Computer Society 1994, ISBN 0-89791-685-9 BibTeX
- Rolf Drechsler, Bernd Becker, Michael Theobald:
Fast OFDD based minimization of fixed polarity Reed-Muller expressions.
2-7
Electronic Edition (ACM DL) BibTeX
- Marek A. Perkowski, Philip Ho:
Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping.
8-13
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- Luc Burgun, N. Dictus, Alain Greiner, E. Prado Lopes, C. Sarwary:
Multilevel logic optimization of very high complexity circuits.
14-19
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- Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Symbolic exploration of large circuits with enhanced forward/backward traversals.
22-27
Electronic Edition (ACM DL) BibTeX
- Stefan Lenk:
Extended timing diagrams as a specification language.
28-33
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- Ti-Yen Yen, Wayne Wolf, Albert E. Casavant, Alex Ishii:
Efficient algorithms for interface timing verification.
34-39
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- Kerry S. Lowe, P. Glenn Gulak:
A unified discrete gate sizing/cell library optimization method for design and analysis of delay minimized CMOS and BiCMOS circuits.
42-47
Electronic Edition (ACM DL) BibTeX
- Markus Theißinger, Ronald D. Hindmarsh:
Layout optimization of planar CMOS cells regarding width-to-height trade-off.
48-53
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- H. Mathias, J. Berger-Toussan, Frédéric Gaffiot, L. Hébrard, Gilles Jacquemod, Michel Le Helley:
Automatic layout generation for CMOS analog transistors.
54-58
Electronic Edition (ACM DL) BibTeX
- Klaus Buchenrieder, Christian Veith:
A prototyping environment for control-oriented HW/SW systems using state-charts, activity-charts and FPGA's.
60-65
Electronic Edition (ACM DL) BibTeX
- Jie Gong, Daniel D. Gajski, Alex Nicolau:
A performance evaluator for parameterized ASIC architectures.
66-71
Electronic Edition (ACM DL) BibTeX
- A. Both, B. Biermann, R. Lerch, Yiannos Manoli, K. Sievert:
Hardware-software-codesign of application specific microcontrollers with the ASM environment.
72-76
Electronic Edition (ACM DL) BibTeX
- Marc Wendling, Wolfgang Rosenstiel:
A hardware environment for prototyping and partitioning based on multiple FPGAs.
77-82
Electronic Edition (ACM DL) BibTeX
- Ali Shahid, Muhammad S. T. Benten, Sadiq M. Sait:
GSA: scheduling and allocation using genetic algorithm.
84-89
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- Birger Landwehr, Peter Marwedel, Rainer Dömer:
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming.
90-95
Electronic Edition (ACM DL) BibTeX
- Krzysztof Bilinski, Erik L. Dagless, Jonathan M. Saul, Marian Adamski:
Parallel controller synthesis from a Petri net specification.
96-101
Electronic Edition (ACM DL) BibTeX
- W. Rissiek, O. Rethmeier, H. Holzheuer:
Parallel algorithms for the simulation of lossy transmission lines.
104-109
Electronic Edition (ACM DL) BibTeX
- Konstantin O. Petrosjanc, Peter P. Maltcev:
Mixed electrical-thermal and electrical-mechanical simulation of electromechatronic systems using PSpice.
110-115
Electronic Edition (ACM DL) BibTeX
- Matthias Tröscher, Hans Hartmann, Georg Klein, Andreas Plettner:
TRICAP—a three dimensional capacitance solver for arbitrarily shaped conductors on printed circuit boards and VLSI interconnections.
116-121
Electronic Edition (ACM DL) BibTeX
- S. Forno, Stephen Rochel:
Advanced simulation and modeling techniques for hardware quality verification of digital systems.
122-127
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- James B. Burr, Allen M. Peterson, Gerard K. Yeh, Kallol Kumar Bagchi:
OPERAS in a DSP CAD environment.
130-135
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- Kaushik Roy, Sharat Prasad:
Logic synthesis for reliability—an early start to controlling electromigration and hot carrier effects.
136-141
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- Loganath Ramachandran, Daniel D. Gajski, Sanjiv Narayan, Frank Vahid, Peter Fung:
100-hour design cycle: a test case.
144-149
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- Bruce K. Holmer:
A tool for processor instruction set design.
150-155
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- Peter Marwedel, Rainer Leupers:
Instruction set extraction from programmable structures.
156-161
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- Sudhakar Muddu, Andrew B. Kahng:
Optimal equivalent circuits for interconnect delay calculations using moments.
164-169
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- Peter Feldmann, Roland W. Freund:
Efficient linear circuit analysis by Pade´ approximation via the Lanczos process.
170-175
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- Vladimir B. Dmitriyev-Zdorov:
Multilevel generalization of relaxation algorithms for circuit simulation.
176-181
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- Victor V. Denisenko:
MOS VLSI circuit simulation by hardware accelerator using semi-natural models.
182-186
Electronic Edition (ACM DL) BibTeX
- A. J. van der Hoeven, K. Olav ten Bosch, Rene van Leuken, Pieter van der Wolf:
A flexible access control mechanism for CAD frameworks.
188-193
Electronic Edition (ACM DL) BibTeX
- Flávio Rech Wagner, Lia Goldstein Golendziner, Miguel Rodrigues Fornari:
A tightly coupled approach to design and data management.
194-199
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- Nick Filer, Michael Brown, Zahir Moosa:
Integrating CAD tools into a framework environment using a flexible and adaptable procedural interface.
200-205
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- Olav Schettler:
Design tool encapsulation—all problems solved?
206-211
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- Frank Vahid, Daniel D. Gajski, Jie Gong:
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning.
214-219
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- Xun Xiong, Edna Barros, Wolfgang Rosenstiel:
A method for partitioning UNITY language in hardware and software.
220-225
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- Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen:
Hardware/software partitioning and minimizing memory interface traffic.
226-231
Electronic Edition (ACM DL) BibTeX
- Edgar Holmann, Ivan R. Linscott, G. Leonard Tyler:
Reliability study of combinatorial circuits.
234-239
Electronic Edition (ACM DL) BibTeX
- Arno Kunzmann:
Test pattern generation hardware motivated by pseudo-exhaustive test techniques.
240-245
Electronic Edition (ACM DL) BibTeX
- Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda:
An experimental analysis of the effectiveness of the circular self-test path technique.
246-251
Electronic Edition (ACM DL) BibTeX
- Sayed Mohammad Kia, Sri Parameswaran:
Design automation of self checking circuits.
252-257
Electronic Edition (ACM DL) BibTeX
- Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins:
An architecture-independent approach to FPGA routing based on multi-weighted graphs.
259-264
Electronic Edition (ACM DL) BibTeX
- Shashidhar Thakur, D. F. Wong, S. Muthukrishnan:
Algorithms for a switch module routing problem.
265-270
Electronic Edition (ACM DL) BibTeX
- Roman Kuznar, Baldomir Zajc, Franc Brglez:
A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.
271-276
Electronic Edition (ACM DL) BibTeX
- Srilata Raman, C. L. Liu, Larry G. Jones:
A delay driven FPGA placement algorithm.
277-282
Electronic Edition (ACM DL) BibTeX
- Ramayya Kumar, Sofiène Tahar:
Formal verification of pipeline conflicts in RISC processors.
284-289
Electronic Edition (ACM DL) BibTeX
- Matthias Mutz:
An automatically verified generalized multifunction arithmetic pipeline.
290-295
Electronic Edition (ACM DL) BibTeX
- Edwin A. Harcourt, Jon Mauney, Todd A. Cook:
Formal specification and simulation of instruction-level parallelism.
296-301
Electronic Edition (ACM DL) BibTeX
- Krzysztof Bilinski, Erik L. Dagless, Jonathan Saul, Janusz Szajna:
An efficient verification algorithm for parallel controllers.
302-307
Electronic Edition (ACM DL) BibTeX
- Andrzej Krasniewski, Leszek B. Wronski:
Tests for path delay faults vs. tests for gate delay faults: how different they are.
310-315
Electronic Edition (ACM DL) BibTeX
- Karl Fuchs, Michael Pabst, Torsten Rössel:
RESIST: a recursive test pattern generation algorithm for path delay faults.
316-321
Electronic Edition (ACM DL) BibTeX
- Rolf Drechsler:
BiTeS: a BDD based test pattern generator for strong robust path delay faults.
322-327
Electronic Edition (ACM DL) BibTeX
- Luciano Lavagno, Antonio Lioy, Michael Kishinevsky:
Testing redundant asynchronous circuits by variable phase splitting.
328-333
Electronic Edition (ACM DL) BibTeX
- Salvador Mir, Nick Filer:
Re-engineering hardware specifications by exploiting design semantics.
336-341
Electronic Edition (ACM DL) BibTeX
- Michael Brown, Nick Filer, Zahir Moosa:
The use of semantic information for control of a complex routing tool.
342-347
Electronic Edition (ACM DL) BibTeX
- Félix Moreno, Juan M. Meneses:
A new knowledge-based design manager assistant for CAD frameworks.
348-353
Electronic Edition (ACM DL) BibTeX
- Chris J. Rousse, Alison J. Carter:
The use of single and multiple seed architectures with a natural based micro-architecture exploration algorithm.
354-359
Electronic Edition (ACM DL) BibTeX
- Winfried Hahn, Andreas Hagerer, C. Herrmann:
Compiled-code-based simulation with timing verification.
362-367
Electronic Edition (ACM DL) BibTeX
- Peter Luksch:
A portable and extendible testbed for distributed logic simulation.
368-373
Electronic Edition (ACM DL) BibTeX
- Jindrich Zejda, Eduard Cerny:
Gate-level timing verification using waveform narrowing.
374-379
Electronic Edition (ACM DL) BibTeX
- R. Peset Llopis:
Exact path sensitization in timing analysis.
380-385
Electronic Edition (ACM DL) BibTeX
- Peter H. Schneider, Kurt Antreich, Ulf Schlichtmann:
A new power estimation technique with application to decomposition of Boolean functions for low power.
388-393
Electronic Edition (ACM DL) BibTeX
- C. Y. Roger Chen, Mohammed Aloqeely:
A new technique for exploiting regularity in data path synthesis.
394-399
Electronic Edition (ACM DL) BibTeX
- Smita Bakshi, Daniel D. Gajski:
A component selection algorithm for high-performance pipelines.
400-405
Electronic Edition (ACM DL) BibTeX
- E. Griese, J. Schrage, M. Vogt:
Fast simulation method for the detection of reflection—and crosstalk effects during the design of complex printed circuit boards.
408-413
Electronic Edition (ACM DL) BibTeX
- Stefan Öing, Werner John:
Design support of printed circuit boards concerning radiation and irradiation effects (EMI): using an extended EMC-Workbench.
414-419
Electronic Edition (ACM DL) BibTeX
- Jean-Louis Blanchard, Jean-Michel Morelle:
Overall thermal simulation of electronic equipment.
420-425
Electronic Edition (ACM DL) BibTeX
- Henrik Esbensen:
A macro-cell global router based on two genetic algorithms.
428-433
Electronic Edition (ACM DL) BibTeX
- Zahir Moosa, Michael Brown, Douglas Edwards:
An appreciation of simulated annealing to maze routing.
434-439
Electronic Edition (ACM DL) BibTeX
- Chung-Wen Albert Tsao, Andrew B. Kahng:
Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay.
440-445
Electronic Edition (ACM DL) BibTeX
- Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekbergen:
A general state graph transformation framework for asynchronous synthesis.
448-453
Electronic Edition (ACM DL) BibTeX
- Christian D. Nielsen:
Evaluation of function blocks for asynchronous design.
454-459
Electronic Edition (ACM DL) BibTeX
- Reimund Wittmann, Bedrich J. Hosticka, Michael Schanz, Werner Schardein, Stefan Kern, Reinhold Vahrmann:
Application-independent hierarchical synthesis methodology for analogue circuits.
466-471
Electronic Edition (ACM DL) BibTeX
- Walling R. Cyre, Jim Armstrong, M. Manek-Honcharik, Alexander J. Honcharik:
Generating VHDL models from natural language descriptions.
474-479
Electronic Edition (ACM DL) BibTeX
- Kevin O'Brien, Serge Maginot:
Non-reversible VHDL source-source encryption.
480-485
Electronic Edition (ACM DL) BibTeX
- Jan Madsen, Jens P. Brage:
Modeling shared variables in VHDL.
486-491
Electronic Edition (ACM DL) BibTeX
- Jari Toivanen, Jari Honkola, Jari Nurmi, Jyrki Tuominen:
A VHDL-based bus model for multi-PCB system design.
492-497
Electronic Edition (ACM DL) BibTeX
- Wolfgang Müller, Egon Börger, Uwe Glässer:
The semantics of behavioral VHDL '93 descriptions.
500-505
Electronic Edition (ACM DL) BibTeX
- Catherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto:
A process algebra interpretation of a verification oriented overlanguage of VHDL.
506-511
Electronic Edition (ACM DL) BibTeX
- Luis Sánchez Fernández, Peter T. Breuer, Carlos Delgado Kloos:
Proof theory and a validation condition generator for VHDL.
512-517
Electronic Edition (ACM DL) BibTeX
- Juan Carlos Calderón, Enric Corominas, José M. Tapia, Luis París:
Implementation of a SDH STM-N IC for B-ISDN using VHDL based synthesis tools.
520-525
Electronic Edition (ACM DL) BibTeX
- France Mendez:
VHDL and cyclic corrector codes.
526-531
Electronic Edition (ACM DL) BibTeX
- Michael Held, Manfred Glesner:
Generating compilers for generated datapaths.
532-537
Electronic Edition (ACM DL) BibTeX
- Petru Eles, Marius Minea, Krzysztof Kuchcinski, Zebo Peng:
Synthesis of VHDL concurrent processes.
540-545
Electronic Edition (ACM DL) BibTeX
- Norbert Wehn, J. Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, S. Rumler:
Scheduling of behavioral VHDL by retiming techniques.
546-551
Electronic Edition (ACM DL) BibTeX
- Frank Vahid, Daniel D. Gajski, Sanjiv Narayan:
A transformation for integrating VHDL behavioral specification with synthesis and software generation.
552-557
Electronic Edition (ACM DL) BibTeX
- Felix Nicoli, Laurence Pierre:
Formal verification of behavioral VHDL specifications: a case study.
560-565
Electronic Edition (ACM DL) BibTeX
- Hans Eveking:
(V)HDL-based verification of heterogeneous synchronous/asynchronous systems.
566-571
Electronic Edition (ACM DL) BibTeX
- Gert Döhmen:
Petri nets as intermediate representation between VHDL and symbolic transition systems.
572-577
Electronic Edition (ACM DL) BibTeX
- Ronald Herrmann, Hergen Pargmann:
Computing binary decision diagrams for VHDL data types.
578-583
Electronic Edition (ACM DL) BibTeX
- Mario Stefanoni:
Static analysis for VHDL model evaluation.
586-591
Electronic Edition (ACM DL) BibTeX
- Karen Hale:
Automotive databus simulation using VHDL.
592-597
Electronic Edition (ACM DL) BibTeX
- David B. Bernstein, Werner van Almsick, Wilfried Daehn:
Distributed simulation for structural VHDL netlists.
598-603
Electronic Edition (ACM DL) BibTeX
- Arlet Ottens, Henk Corporaal, Wilco Van Hoogstraeten:
A new flexible VHDL simulator.
604-609
Electronic Edition (ACM DL) BibTeX
- Donatella Sciuto, Stefano Antoniazzi, Alessandro Balboni, William Fornaciari:
The role of VHDL within the TOSCA hardware/software codesign framework.
612-617
Electronic Edition (ACM DL) BibTeX
- P. Gutberlet, Wolfgang Rosenstiel:
Timing preserving interface transformations for the synthesis of behavioral VHDL.
618-623
Electronic Edition (ACM DL) BibTeX
- Wolfgang Ecker, Manfred Glesner, Andreas Vombach:
Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations.
624-629
Electronic Edition (ACM DL) BibTeX
- Loïc Vandeventer, Jean François Santucci:
Speeding up test pattern generation from behavioral VHDL descriptions containing several processes.
632-637
Electronic Edition (ACM DL) BibTeX
- Loïc Vandeventer, Jean François Santucci:
Algorithms for behavioral test pattern generation from VHDL circuit descriptions containing loop language constructs.
638-643
Electronic Edition (ACM DL) BibTeX
- Xinli Gu, Krzysztof Kuchcinski, Zebo Peng:
Testability analysis and improvement from VHDL behavioral specifications.
644-649
Electronic Edition (ACM DL) BibTeX
- Christopher A. Ryan, Joseph G. Tront:
VHDL switch level fault simulation.
650-655
Electronic Edition (ACM DL) BibTeX
- Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk:
ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec.
658-663
Electronic Edition (ACM DL) BibTeX
- Maurizio Valle, Daniele D. Caviglia, Marco Cornero, Giovanni Nateri, Luciano Briozzo:
A VHDL-based design methodology: the design experience of a high performance ASIC chip.
664-669
Electronic Edition (ACM DL) BibTeX
- Daniel Clavelier, Bernard Hennion, Christopher Nilson:
SYNOPA: an automated synthesizer for CMOS operational amplifiers.
670-675
Electronic Edition (ACM DL) BibTeX
- Alain Greiner, Frédéric Pétrot:
Using C to write portable CMOS VLSI module generators.
676-681
Electronic Edition (ACM DL) BibTeX
- Stefan Tamme:
Rapid prototyping for DSP circuits using high level design tools.
682-687
Electronic Edition (ACM DL) BibTeX
- Alexander Y. Tetelbaum:
CAD education and science in Ukraine after Perestroika.
688-693
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:11:12 2009
by Michael Ley (ley@uni-trier.de)
