| 2007 |
|---|
| 8 | EE | Youcef Bouchebaba,
Essaid Bensoudane,
Bruno Lavigueur,
Pierre G. Paulin,
Gabriela Nicolescu:
Two-level tiling for MPSoC architecture.
ASAP 2007: 314-319 |
| 2006 |
|---|
| 7 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Olivier Benny,
Damien Lyonnard,
Bruno Lavigueur,
David Lo:
Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems.
DATE 2006: 482-487 |
| 6 | EE | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano,
Pierre G. Paulin,
Essaid Bensoudane:
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures.
VLSI-SoC 2006: 146-151 |
| 5 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Damien Lyonnard,
Olivier Benny,
Bruno Lavigueur,
David Lo,
Giovanni Beltrame,
V. Gagne,
Gabriela Nicolescu:
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.
IEEE Trans. VLSI Syst. 14(7): 667-680 (2006) |
| 2004 |
|---|
| 4 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Gabriela Nicolescu:
Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management.
CODES+ISSS 2004: 48-53 |
| 3 | EE | Pierre G. Paulin,
Chuck Pilkington,
Essaid Bensoudane,
Michel Langevin,
Damien Lyonnard:
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding.
DATE 2004: 58-63 |
| 2003 |
|---|
| 2 | EE | Pierre G. Paulin,
Chuck Pilkington,
Essaid Bensoudane:
Network Processing Challenges and an Experimental NPU Platform.
DATE 2003: 20064-20069 |
| 2002 |
|---|
| 1 | EE | Pierre G. Paulin,
Chuck Pilkington,
Essaid Bensoudane:
StepNP: A System-Level Exploration Platform for Network Processors.
IEEE Design & Test of Computers 19(6): 17-26 (2002) |
