2001 |
8 | EE | Daniel Gajski,
Eugenio Villar,
Wolfgang Rosenstiel,
Vassilios Gerousis,
D. Barton,
J. Plantin,
S. E. Ericsson,
Patrizia Cavalloro,
Gjalt G. de Jong:
C/C++: progress or deadlock in system-level specification.
DATE 2001: 136-137 |
1998 |
7 | | Alberto Allara,
Massimo Bombana,
Patrizia Cavalloro,
Wolfgang Nebel,
Wolfram Putzke-Röming,
Martin Radetzki:
ATM Cell Modelling using Objective VHDL.
ASP-DAC 1998: 261-264 |
1995 |
6 | EE | Massimo Bombana,
Patrizia Cavalloro,
Salvatore Conigliaro,
Roger B. Hughes,
Gerry Musgrave,
Giuseppe Zaza:
Design-Flow and Synthesis for ASICs: A Case Study.
DAC 1995: 292-297 |
1994 |
5 | | G. Bezzi,
Massimo Bombana,
Patrizia Cavalloro,
Salvatore Conigliaro,
Giuseppe Zaza:
Quantitative Evaluation of Formal Based Synthesis in ASIC Design.
TPCD 1994: 286-291 |
4 | EE | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
ALADIN: a multilevel testability analyzer for VLSI system design.
IEEE Trans. VLSI Syst. 2(2): 157-171 (1994) |
1993 |
3 | | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks.
DFT 1993: 223-230 |
2 | | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
An Expert Solution to Functional Testability Analysis of VLSI Circuits.
SEKE 1993: 263-265 |
1992 |
1 | | Massimo Bombana,
Patrizia Cavalloro,
Giuseppe Zaza:
Specification and Formal Synthesis of Digital Circuits.
TPHOLs 1992: 475-484 |