1996 |
6 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Design tradeoffs in high speed multipliers and FIR filters.
VLSI Design 1996: 29-32 |
5 | EE | Manjit Borah,
Chetana Nagendra,
Mohan Vishwanath,
Robert Michael Owens,
Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh.
VLSI Signal Processing 13(1): 67-75 (1996) |
1995 |
4 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Unifying carry-sum and signed-digital number representations for low power.
ISLPD 1995: 15-20 |
3 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Digit pipelined arithmetic on fine-grain array processors.
VLSI Signal Processing 9(3): 193-209 (1995) |
1994 |
2 | | Manjit Borah,
Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS.
HICSS (1) 1994: 96-104 |
1 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Power-delay characteristics of CMOS adders.
IEEE Trans. VLSI Syst. 2(3): 377-381 (1994) |