12. FPGA 2004: Monterey, CA, USA

Architectures

• Nicholas Weaver, John R. Hauser, John Wawrzynek:
  The SFRA: a corner-turn FPGA architecture. 3-12
  Electronic Edition (ACM DL) BibTeX
• Akshay Sharma, Katherine Compton, Carl Ebeling, Scott Hauck:
  Exploration of pipelined FPGA interconnect structures. 13-22
  Electronic Edition (ACM DL) BibTeX
• Arifur Rahman, Vijay Polavarapuv:
  Evaluation of low-leakage design techniques for field programmable gate arrays. 23-30
  Electronic Edition (ACM DL) BibTeX

Tools and architectures for power minimization

• Jason Helge Anderson, Farid N. Najm, Tim Tuan:
  Active leakage power optimization for FPGAs. 33-41
  Electronic Edition (ACM DL) BibTeX
• Fei Li, Yan Lin, Lei He, Jason Cong:
  Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics. 42-50
  Electronic Edition (ACM DL) BibTeX
• Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan:
  Reducing leakage energy in FPGAs using region-constrained placement. 51-58
  Electronic Edition (ACM DL) BibTeX

Applications I

• Paul Metzgen:
  A high performance 32-bit ALU for programmable logic. 61-70
  Electronic Edition (ACM DL) BibTeX
• Paul Kohlbrenner, Kris Gaj:
  An embedded true random number generator for FPGAs. 71-78
  Electronic Edition (ACM DL) BibTeX
• Sergio López-Buedo, Eduardo I. Boemo:
  Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report. 79-86
  Electronic Edition (ACM DL) BibTeX

Tools

• Tomasz S. Czajkowski, Jonathan Rose:
  A synthesis oriented omniscient manual editor. 89-98
  Electronic Edition (ACM DL) BibTeX
• Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi Chou:
  Incremental physical resynthesis for timing optimization. 99-108
  Electronic Edition (ACM DL) BibTeX
• Deming Chen, Jason Cong, Fei Li, Lei He:
  Low-power technology mapping for FPGA architectures with dual supply voltages. 109-117
  Electronic Edition (ACM DL) BibTeX
• André DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica:
  What is the right model for programming and using modern FPGAs? 119
  Electronic Edition (ACM DL) BibTeX

Novel devices and approaches to programmable devices

• André DeHon, Michael J. Wilson:
  Nanowire-based sublithographic programmable logic arrays. 123-132
  Electronic Edition (ACM DL) BibTeX
• John Teifel, Rajit Manohar:
  Highly pipelined asynchronous FPGAs. 133-142
  Electronic Edition (ACM DL) BibTeX
• Steve Ferrera, Nicholas P. Carter:
  A magnetoelectronic macrocell employing reconfigurable threshold logic. 143-151
  Electronic Edition (ACM DL) BibTeX

Reconfigurable computing: analysis and trends

• Katherine Compton, Scott Hauck:
  Flexibility measurement of domain-specific reconfigurable hardware. 155-161
  Electronic Edition (ACM DL) BibTeX
• Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers:
  A quantitative analysis of the speedup factors of FPGAs over processors. 162-170
  Electronic Edition (ACM DL) BibTeX
• Keith D. Underwood:
  FPGAs vs. CPUs: trends in peak floating-point performance. 171-180
  Electronic Edition (ACM DL) BibTeX

Reconfigurable computing: architectures and applications

• Jason Cong, Yiping Fan, Guoling Han, Zhiru Zhang:
  Application-specific instruction generation for configurable processor architectures. 183-189
  Electronic Edition (ACM DL) BibTeX
• Lesley Shannon, Paul Chow:
  Using reconfigurability to achieve real-time profiling for hardware/software codesign. 190-199
  Electronic Edition (ACM DL) BibTeX
• Richard B. Kujoth, Chi-Wei Wang, Derek B. Gottlieb, Jeffrey J. Cook, Nicholas P. Carter:
  A reconfigurable unit for a clustered programmable-reconfigurable processor. 200-209
  Electronic Edition (ACM DL) BibTeX

Applications II

• Wang Chen, Panos Kosmas, Miriam Leeser, Carey Rappaport:
  An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm. 213-222
  Electronic Edition (ACM DL) BibTeX
• Zachary K. Baker, Viktor K. Prasanna:
  Time and area efficient pattern matching on FPGAs. 223-232
  Electronic Edition (ACM DL) BibTeX
• John F. Keane, Christopher Bradley, Carl Ebeling:
  A compiled accelerator for biological cell signaling simulations. 233-241
  Electronic Edition (ACM DL) BibTeX

Poster abstracts

• Anatole D. Ruslanov, Jeremy R. Johnson:
  An FPGA implementation of bene permutation networks. 245
  Electronic Edition (ACM DL) BibTeX
• Erik Chmelar:
  Subframe multiplexing for FPGA manufacturing test configuration. 245
  Electronic Edition (ACM DL) BibTeX
• Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar:
  An FPGA implementation of block truncation coding for gray and color images. 245
  Electronic Edition (ACM DL) BibTeX
• Andrea Lodi, Roberto Giansante, Carlo Chiesa, Luca Ciccarelli, Mario Toma, Fabio Campi:
  Routing architecture for multi-context FPGAs. 246
  Electronic Edition (ACM DL) BibTeX
• Richard Carbone, Andreas E. Savakis:
  A flexible hardware architecture for 2-D discrete wavelet transform. 246
  Electronic Edition (ACM DL) BibTeX
• Bret Woz, Andreas E. Savakis:
  A VHDL MPEG-7 shape descriptor extractor. 246
  Electronic Edition (ACM DL) BibTeX
• Daniel Denning, Malachy Devlin, James Irvine:
  Hardware co-simulation in system generator of the AES-128 encryption algorithm. 247
  Electronic Edition (ACM DL) BibTeX
• Helmut Steckenbiller, Rudi Knorr:
  Buffer schemes for runtime reconfiguration of function variants in communication systems. 247
  Electronic Edition (ACM DL) BibTeX
• Christian Hinkelbein, Andrei Khomich, Andreas Kugel, Reinhard Männer, Matthias Müller:
  Using an FPGA coprocessor for improving execution speed of TRT-LUT: one of the feature extraction algorithms for ATLAS LVL2 trigger. 247
  Electronic Edition (ACM DL) BibTeX
• Gabriel Caffarena, Slobodan Bojanic, Juan A. López, Carlos E. Pedreira, Octavio Nieto-Taladriz:
  High-speed systolic array for gene matching. 248
  Electronic Edition (ACM DL) BibTeX
• Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
  The gigahertz FPGA: design consideration and applications. 248
  Electronic Edition (ACM DL) BibTeX
• Christopher C. Doss, Robert L. Riley Jr.:
  FPGA-based implementation of single-precision exponential unit. 248
  Electronic Edition (ACM DL) BibTeX
• Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee:
  High level area, delay and power estimation for FPGAs. 249
  Electronic Edition (ACM DL) BibTeX
• Jae-Jin Lee, Gi-Yong Song:
  Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial semi-systolic multiplier. 249
  Electronic Edition (ACM DL) BibTeX
• Ian Kuon, Aaron Egier, Jonathan Rose:
  Transistor grouping and metal layer trade-offs in automatic tile layout of FPGAs. 249
  Electronic Edition (ACM DL) BibTeX
• Katsunori Tanaka, Shigeru Yamashita, Yahiko Kambayashi:
  SPFD-based one-to-many rewiring. 250
  Electronic Edition (ACM DL) BibTeX
• Joseph Zambreno, Rahul Simha, Alok N. Choudhary:
  Addressing application integrity attacks using a reconfigurable architecture. 250
  Electronic Edition (ACM DL) BibTeX
• Jianhua Liu, Michael Chang, Chung-Kuan Cheng, John F. MacDonald, Nan-Chi Chou, Peter Suaris:
  Fast adders in modern FPGAs. 250
  Electronic Edition (ACM DL) BibTeX
• A. Manoj Kumar, B. Jayaram, V. Kamakoti:
  SHAPER: synthesis for hybrid FPGA architectures containing PLA elements using reconvergence analysis. 251
  Electronic Edition (ACM DL) BibTeX
• Mark L. Chang, Scott Hauck:
  Least-significant bit optimization techniques for FPGAs. 251
  Electronic Edition (ACM DL) BibTeX
• Martin Danek, Josef Kolar:
  FPGA modelling for high-performance algorithms. 251
  Electronic Edition (ACM DL) BibTeX
• Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis:
  A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. 252
  Electronic Edition (ACM DL) BibTeX
• Michael J. Wirthlin:
  Improving the reliability of FPGA circuits using triple-modular redundancy (TMR) & efficient voter placement. 252
  Electronic Edition (ACM DL) BibTeX
• Christophe Wolinski, Krzysztof Kuchcinski, Maya Gokhale:
  A constraints programming approach to communication scheduling on SoPC architectures. 252
  Electronic Edition (ACM DL) BibTeX
• Ian Kuon, Navid Azizi, Ahmad Darabiha, Aaron Egier, Paul Chow:
  FPGA-based supercomputing: an implementation for molecular dynamics. 253
  Electronic Edition (ACM DL) BibTeX
• Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis:
  Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources. 253
  Electronic Edition (ACM DL) BibTeX
• Paul Berube, José Nelson Amaral, Mike MacGregor:
  An FPGA prototype for the experimental evaluation of a multizone network cache. 253
  Electronic Edition (ACM DL) BibTeX
• Phan C. Vinh, Jonathan P. Bowen:
  An algorithmic approach by heuristics to dynamical reconfiguration of logic resources on reconfigurable FPGAs. 254
  Electronic Edition (ACM DL) BibTeX
• Magesh Sadasivam, Sangjin Hong:
  Dynamically reconfigurable architecture for high-throughput processing of data centric applications. 254
  Electronic Edition (ACM DL) BibTeX
• Pronita Mehrotra, Mrugendra Singhai, Mike Pratt, Mark Cassada, Patrick Hamilton:
  FPGA implementation of a high speed network interface card for optical burst switched networks. 255
  Electronic Edition (ACM DL) BibTeX
• Rohini Krishnan, José Pineda de Gyvez, Martijn T. Bennebroek:
  Low energy FPGA interconnect design. 255
  Electronic Edition (ACM DL) BibTeX
• Roland E. Wunderlich, James C. Hoe:
  In-system FPGA prototyping of an itanium microarchitecture. 255
  Electronic Edition (ACM DL) BibTeX
• Brian Leonard, Jeff Young, Ron Sass:
  Online placement infrastructure to support run-time reconfiguration. 256
  Electronic Edition (ACM DL) BibTeX
• Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee:
  An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. 256
  Electronic Edition (ACM DL) BibTeX
• Ranjesh G. Jaganathan, Matthew Simpson, Ron Sass:
  Automatic discovery, selection, and specialization of modules in RCADE. 256
  Electronic Edition (ACM DL) BibTeX
• Vinay Verma, Shantanu Dutt:
  Roving testing using new built-in-self-tester designs for FPGAs. 257
  Electronic Edition (ACM DL) BibTeX
• Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
  Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity. 257
  Electronic Edition (ACM DL) BibTeX
• Bo Yang, Ramesh Karri, David A. McGrew:
  Divide and concatenate: a scalable hardware architecture for universal MAC. 258
  Electronic Edition (ACM DL) BibTeX
• Thilo Pionteck, Thorsten Staake, Thomas Stiefmeier, Lukusa D. Kabulepa, Manfred Glesner:
  On the design of a function-specific reconfigurable: hardware accelerator for the MAC-layer in WLANs. 258
  Electronic Edition (ACM DL) BibTeX
• Sashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi:
  Implementation of elliptic curve cryptosystems over GF(2ⁿ) in optimal normal basis on a reconfigurable computer. 259
  Electronic Edition (ACM DL) BibTeX
• Remy Eskinazi Sant'Anna, Manoel Eusebio de Lima, Paulo Romero Martins Maciel:
  A left-edge algorithm approach for scheduling and allocation of hardware contexts in dynamically reconfigurable architectures. 259
  Electronic Edition (ACM DL) BibTeX
• Elias Todorovich, Eduardo I. Boemo, F. Cardells, Javier Valls:
  Power analysis and estimation tool integrated with XPOWER. 259
  Electronic Edition (ACM DL) BibTeX