ISQED 2004:
San Jose,
California,
USA
5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA.
IEEE Computer Society 2004, ISBN 0-7695-2093-6 BibTeX
ISQED Tutorials:
Compact Modeling and Analysis for Nanometer-Scale CMOS Design
ISQED Panel Discussion EP1
Plenary Session I
Physical Design Migration
Device and Memory
- Jin He, Xuemei Xi, Mansun Chan, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu:
A Non-Charge-Sheet Based Analytical Model of Undoped Symmetric Double-Gate MOSFETs Using SPP Approach.
45-50
Electronic Edition (link) BibTeX
- Y. Z. Xu, O. Pohland, C. Cai, H. Puchner:
Leakage Increase of Narrow and Short BCPMOS.
51-54
Electronic Edition (link) BibTeX
- Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey:
SRAM Leakage Suppression by Minimizing Standby Supply Voltage.
55-60
Electronic Edition (link) BibTeX
Poster Session
- Zhu Pan, Yici Cai, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong:
Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling.
63-68
Electronic Edition (link) BibTeX
- Lucanus J. Simonson, King Ho Tam, Nataraj Akkiraju, Mosur Mohan, Lei He:
Leveraging Delay Slack in Flip-Flop and Buffer Insertion for Power Reduction.
69-74
Electronic Edition (link) BibTeX
- Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng:
Moment Computations of Nonuniform Distributed Coupled RLC Trees with Applications to Estimating Crosstalk Noise.
75-80
Electronic Edition (link) BibTeX
- Daniela De Venuto:
New Test Access for High Resolution SD ADC's by Using the Noise Transfer Function Evaluation.
81-85
Electronic Edition (link) BibTeX
- Stuart McCracken, Zeljko Zilic:
Design for Testability of FPGA Blocks.
86-91
Electronic Edition (link) BibTeX
- Nikos Konofaos, G. Ph. Alexiou:
New Challenges Emerging on the Design of VLSI Circuits Made of MOSFETs Using New Gate Dielectric Materials.
92-97
Electronic Edition (link) BibTeX
- Dongku Kang, Mark C. Johnson, Kaushik Roy:
Simultaneous Multiple-Vdd Scheduling and Allocation for Partitioned Floorplan.
98-103
Electronic Edition (link) BibTeX
- Volkan Kursun, Eby G. Friedman:
Node Voltage Dependent Subthreshold Leakage Current Characteristics of Dynamic Circuits.
104-109
Electronic Edition (link) BibTeX
- Youngsik Kim, Shekhar Kopuri, Nazanin Mansouri:
Automated Formal Verification of Scheduling Process Using Finite State Machines with Datapath (FSMD).
110-115
Electronic Edition (link) BibTeX
- Eren Kursun, Soheil Ghiasi, Majid Sarrafzadeh:
Transistor Level Budgeting for Power Optimization.
116-121
Electronic Edition (link) BibTeX
- Sunil Yu, Dusan Petranovic, Shoba Krishnan, Kwyro Lee, Cary Y. Yang:
Resistance Matrix in Crosstalk Modeling for Muliconductor Systems.
122-125
Electronic Edition (link) BibTeX
- Bo-Sung Kim, Young-Gi Kim, Soon-Yang Hong:
Low Power 260 k Color TFT LCD One-Chip Driver IC.
126-130
Electronic Edition (link) BibTeX
- Woo Hyung Lee, Sanjay Pant, David Blaauw:
Analysis and Reduction of On-Chip Inductance Effects in Power Supply Grids.
131-136
Electronic Edition (link) BibTeX
- Jong-Eun Koo, Kyung-Ho Lee, Young-Hoe Cheon, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong:
A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks.
137-142
Electronic Edition (link) BibTeX
- M. Moiz Khan, Spyros Tragoudas:
Rewiring for Watermarking Digital Circuits.
143-148
Electronic Edition (link) BibTeX
ISQED Luncheon Speech
Topics in Printability
Package Design and Interaction
Test Generation and Application
Modeling and Simulations of Electromigration and Eletromagnetic Effect
- Valeriy Sukharev:
Physically-Based Simulation of Electromigration Induced Failures in Copper Dual-Damascene Interconnect.
225-231
Electronic Edition (link) BibTeX
- Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda:
A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification.
232-237
Electronic Edition (link) BibTeX
- Syed M. Alam, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel:
Circuit Level Reliability Analysis of Cu Interconnects.
238-243
Electronic Edition (link) BibTeX
- Pavel V. Nikitin, Vikram Jandhyala, Daniel White, Nathan Champagne, John D. Rockway, C.-J. Richard Shi, Chuanyi Yang, Yong Wang, Gong Ouyang, Rob Sharpe, John W. Rockway:
Modeling and Simulation of Circuit-Electromagnetic Effects in Electronic Design Flow.
244-249
Electronic Edition (link) BibTeX
Interconnect:
Capacitance Extraction and Delay Calculation
- Fangqing Yu, Weiping Shi:
A Divide-and-Conquer Algorithm for 3D Capacitance Extraction.
253-258
Electronic Edition (link) BibTeX
- Anirban Basu, Sheng-Chih Lin, Christoph Wasshuber, Adrian M. Ionescu, Kaustav Banerjee:
A Comprehensive Analytical Capacitance Model of a Two Dimensional Nanodot Array.
259-264
Electronic Edition (link) BibTeX
- Y. Quéré, T. LeGouguec, P. M. Martin, F. Huret:
Interconnect Mode Conversion in High-Speed VLSI Circuits.
265-270
Electronic Edition (link) BibTeX
- Ye Liu, Mei Xue, Zheng-Fan Li, Rui-Feng Xue:
Efficient Capacitance Extraction for Periodic Structures by Shanks Transformation.
271-275
Electronic Edition (link) BibTeX
- Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi:
PARADE: PARAmetric Delay Evaluation under Process Variation.
276-280
Electronic Edition (link) BibTeX
Substrate Noise:
Analysis and Prevention
ISQED Panel Discussion EP2
Plenary Session II
Interconnect Delay and Coupling
Analysis of Variations
Layout and Design Techniques for Quality and Reliability
Analog Testing
Low Power Design
ESD
DFM Design Techniques
Delay Test Issues
- Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski:
Delay Fault Diagnosis Using Timing Information.
485-490
Electronic Edition (link) BibTeX
- Saravanan Padmanaban, Spyros Tragoudas:
An Adaptive Path Delay Fault Diagnosis Methodology.
491-496
Electronic Edition (link) BibTeX
- Hangkyu Lee, Irith Pomeranz, Sudhakar M. Reddy:
Scan BIST Targeting Transition Faults Using a Markov Source.
497-502
Electronic Edition (link) BibTeX
- Vijay Degalahal, R. Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
The Effect of Threshold Voltages on the Soft Error Rate.
503-508
Electronic Edition (link) BibTeX
Circuit Design Trends in DSM
- Hari Ananthan, Aditya Bansal, Kaushik Roy:
FinFET SRAM - Device and Circuit Design Considerations.
511-516
Electronic Edition (link) BibTeX
- Volkan Kursun, Siva Narendra, Vivek De, Eby G. Friedman:
High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process.
517-521
Electronic Edition (link) BibTeX
- Ji Luo, Joseph B. Bernstein, J. Ari Tuchman, Hu Huang, Kuan-Jung Chung, Anthony L. Wilson:
A High Performance Radiation-Hard Field Programmable Analog Array .
522-527
Electronic Edition (link) BibTeX
- Ahmad Yazdi, Payam Heydari:
The Design and Analysis of Non-Uniform Down-Sized Differential Distributed Amplifiers.
528-533
Electronic Edition (link) BibTeX
- Navid Azizi, Farid N. Najm:
An Asymmetric SRAM Cell to Lower Gate Leakage.
534-539
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:26:17 2009
by Michael Ley (ley@uni-trier.de)
