D. E. Duarte

List of publications from the DBLP Bibliography Server - FAQ

2004

2 EE Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. VLSI Syst. 12(11): 1221-1233 (2004)

2002

1 EE D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. VLSI Syst. 10(6): 844-855 (2002)

2004
2	EE	Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. VLSI Syst. 12(11): 1221-1233 (2004)
2002
1	EE	D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. VLSI Syst. 10(6): 844-855 (2002)

Coauthor Index

1	Mary Jane Irwin	[1] [2]
2	Yuh-Fang Tsai	[2]
3	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[1] [2]