24. DAC 1987:
Miami Beach,
Florida,
USA
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach,
FL,
June 28 - July 1,
1987. IEEE Computer Society Press / ACM,
1987
- L.-T. Wang, Nathan E. Hoover, Edwin H. Porter, John J. Zasio:
SSIM: A Software Levelized Compiled-Code Simulator.
2-8
Electronic Edition (ACM DL) BibTeX
- Randal E. Bryant, Derek L. Beatty, Karl S. Brace, K. Cho, Thomas J. Sheffler:
COSMOS: A Compiled Simulator for MOS Circuits.
9-16
Electronic Edition (ACM DL) BibTeX
- S. B. Tan, K. Totton, Keith Baker, Prab Varma, R. Porter:
A Fast Signature Simulation Tool for Built-In Self-Testing Circuits.
17-25
Electronic Edition (ACM DL) BibTeX
- Nikrouz Faroughi, Michael A. Shanblatt:
An Improved Systematic Method for Constructing Systolic Arrays from Algorithms.
26-34
Electronic Edition (ACM DL) BibTeX
- Rajiv Jain, Alice C. Parker, Nohbyung Park:
Predicting Area-Time Tradeoffs for Pipelined Design.
35-41
Electronic Edition (ACM DL) BibTeX
- Ramesh Harjani, Rob A. Rutenbar, L. Richard Carley:
A Prototype Framework for Knowledge-Based Analog Circuit Synthesis.
42-49
Electronic Edition (ACM DL) BibTeX
- M. C. Chi:
An Automatic Rectilinear Partitioning Procedure for Standard Cells.
50-55
Electronic Edition (ACM DL) BibTeX
- Lov K. Grover:
Standard Cell Placement Using Simulated Sintering.
56-59
Electronic Edition (ACM DL) BibTeX
- Ralph-Michael Kling, Prithviraj Banerjee:
ESP: A New Standard Cell Placement Package Using Simulated Evolution.
60-66
Electronic Edition (ACM DL) BibTeX
- V. Masurkar:
Requirements for a Practical Software Engineering Environment.
67-73
Electronic Edition (ACM DL) BibTeX
- Jonathan B. Rosenberg:
The Making of VIVID: A Software Engineering Perspective.
74-81
Electronic Edition (ACM DL) BibTeX
- N. J. Elias:
A Case Study in Silicon Compilation Software Engineering, HVDEV High Voltage Device Layout Generator.
82-88
Electronic Edition (ACM DL) BibTeX
- Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steve Lass:
A Vector Hardware Accelerator with Circuit Simulation Emphasis.
89-94
Electronic Edition (ACM DL) BibTeX
- M. T. Smith:
A Hardware Switch Level Simulator for Large MOS Circuits.
95-100
Electronic Edition (ACM DL) BibTeX
- Prathima Agrawal, William J. Dally, Ahmed K. Ezzat, W. C. Fischer, H. V. Jagadish, A. S. Krishnakumar:
Architecture and Design of the MARS Hardware Accelerator.
101-107
Electronic Edition (ACM DL) BibTeX
- Donald M. Webber, Alberto L. Sangiovanni-Vincentelli:
Circuit Simulation on the Connection Machine.
108-113
Electronic Edition (ACM DL) BibTeX
- Kye S. Hedlund:
Aesop: A Tool for Automated Transistor Sizing.
114-120
Electronic Edition (ACM DL) BibTeX
- Mehmet A. Cirit:
Transistor Sizing in CMOS Circuits.
121-124
Electronic Edition (ACM DL) BibTeX
- M. Hofmann, J. K. Kim:
Delay Optimization of Combinational Static CMOS Logic.
125-132
Electronic Edition (ACM DL) BibTeX
- Robert E. Canright, A. R. Helland:
Reflections of High Speed Signals Analyzed as a Delay in Timing for Clocked Logic.
133-139
Electronic Edition (ACM DL) BibTeX
- J. Royle, Mikael Palczewski, H. VerHeyen, N. Naccache, Jiri Soukup:
Geometrical Compaction in One Dimension for Channel Routing.
140-145
Electronic Edition (ACM DL) BibTeX
- D. B. Polkl:
A Three-Layer Gridless Channel Router with Compaction.
146-151
Electronic Edition (ACM DL) BibTeX
- H. H. Chen:
Routing L-Shaped Channels in Nonslicing-Structure Placement.
152-158
Electronic Edition (ACM DL) BibTeX
- Nicholas J. Naclerio, Sumio Masuda, Kazuo Nakajima:
Via Minimization for Gridless Layouts.
159-165
Electronic Edition (ACM DL) BibTeX
- Louise Trevillyan:
An Overview of Logic Synthesis Systems.
166-172
Electronic Edition (ACM DL) BibTeX
- Wojciech Maly:
Realistic Fault Modeling for VLSI Testing.
173-180
Electronic Edition (ACM DL) BibTeX
- Steven P. Smith, M. Ray Mercer, B. Brodk:
Demand Driven Simulation: BACKSIM.
181-187
Electronic Edition (ACM DL) BibTeX
- J. W. Smith, K. S. Smith, Robert J. Smith II:
Faster Architectural Simulation Through Parallelism.
189-194
Electronic Edition (ACM DL) BibTeX
- Pierre G. Paulin, John P. Knight:
Force-Directed Scheduling in Automatic Data Path Synthesis.
195-202
Electronic Edition (ACM DL) BibTeX
- Forrest Brewer, Daniel Gajski:
Knowledge Based Control in Micro-Architecture Design.
203-209
Electronic Edition (ACM DL) BibTeX
- Fadi J. Kurdahi, Alice C. Parker:
REAL: a program for REgister ALlocation.
210-215
Electronic Edition (ACM DL) BibTeX
- R. K. McGehee:
A Practical Moat Router.
216-222
Electronic Edition (ACM DL) BibTeX
- S. Chowdhury:
An Automated Design of Minimum-Area IC Power/Ground Nets.
223-229
Electronic Edition (ACM DL) BibTeX
- Steven T. Healey, William J. Kubitz:
Abstract Routing of Logic Networks for Custom Module Generation.
230-236
Electronic Edition (ACM DL) BibTeX
- Michael H. Schultz, Franc Brglez:
Accelerated Transition Fault Simulation.
237-243
Electronic Edition (ACM DL) BibTeX
- Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana:
On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates.
244-250
Electronic Edition (ACM DL) BibTeX
- S. E. Concina, G. S. Liu:
Integrating Design Information for IC Diagnosis.
251-257
Electronic Edition (ACM DL) BibTeX
- R. M. McDermott, D. Stern:
Switch Directed Dynamic Causal Networks - a Paradigm for Electronic System Diagnosis.
258-264
Electronic Edition (ACM DL) BibTeX
- Daniel Weise:
Functional Verification of MOS Circuits.
265-270
Electronic Edition (ACM DL) BibTeX
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
On the Verification of Sequential Machines at Differing Levels of Abstraction.
271-276
Electronic Edition (ACM DL) BibTeX
- Mandalagiri S. Chandrasekhar, J. P. Privitera, K. W. Conradt:
Application of Term Rewriting Techniques to Hardware Design Verification.
277-282
Electronic Edition (ACM DL) BibTeX
- Hi-Keung Tony Ma, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli, R. Wei:
Logic Verification Algorithms and Their Parallel Implementation.
283-290
Electronic Edition (ACM DL) BibTeX
- C. W. Carpenter, Mark Horowitz:
Generating Incremental VLSI Compaction Spacing Constraints.
291-297
Electronic Edition (ACM DL) BibTeX
- Xiao-Ming Xiong, Ernest S. Kuh:
Nutcracker: An Efficient and Intelligent Channel Spacer.
298-304
Electronic Edition (ACM DL) BibTeX
- Lars S. Nyland, Stephen W. Daniel, D. Rogers:
Improving Virtual-Grid Compaction Through Grouping.
305-310
Electronic Edition (ACM DL) BibTeX
- Bill Lin, A. Richard Newton:
KAHLUA: A Hierarchical Circuit Disassembler.
311-317
Electronic Edition (ACM DL) BibTeX
- Bryan Preas:
Benchmarks for Cell-Based Layout Systems.
319-320
Electronic Edition (ACM DL) BibTeX
- Rajiv Bhateja, Randy H. Katz:
VALKYRIE: A Validation Subsystem of a Version Server for Computer-Aided Design Data.
321-327
Electronic Edition (ACM DL) BibTeX
- Arnon Rosenthal, Sandra Heiler:
Querying Part Hierarchies: A Knowledge-Based Approach.
328-334
Electronic Edition (ACM DL) BibTeX
- Sandra Heiler, Umeshwar Dayal, Jack A. Orenstein, S. Radke-Sproull:
An Object-Oriented Approach to Data Management: Why Design Databases Need It.
335-340
Electronic Edition (ACM DL) BibTeX
- Kurt Keutzer:
DAGON: Technology Binding and Local Optimization by DAG Matching.
341-347
Electronic Edition (ACM DL) BibTeX
- J. A. Beekman, Robert Michael Owens, Mary Jane Irwin:
Mesh Arrays and LOGICIAN: A Tool for Their Efficient Generation.
357-362
Electronic Edition (ACM DL) BibTeX
- Steven J. Friedman, Kenneth J. Supowit:
Finding the Optimal Variable Ordering for Binary Decision Diagrams.
358-356
Electronic Edition (ACM DL) BibTeX
- J. Apte, Gershon Kedem:
Strip Layout: A New Layout Methodology for Standard Circuit Modules.
363-369
Electronic Edition (ACM DL) BibTeX
- Johannes Schuck, Norbert Wehn, Manfred Glesner, G. Kamp:
The ALGIC Silicon Compiler System: Implementation, Design Experience and Results.
370-375
Electronic Edition (ACM DL) BibTeX
- Wayne Wei-Ming Dai, Masao Sato, Ernest S. Kuh:
A Dynamic and Efficient Representation of Building-Block Layout.
376-384
Electronic Edition (ACM DL) BibTeX
- Chun-Yeh Liu, Kewal K. Saluja, Shambhu J. Upadhyaya:
BIST-PLA: A Built-in Self-Test Design of Large Programmable Logic Arrays.
385-391
Electronic Edition (ACM DL) BibTeX
- Hans-Joachim Wunderlich:
On Computing Optimized Input Probabilities for Random Tests.
392-398
Electronic Edition (ACM DL) BibTeX
- Philip S. Yu, C. Mani Krishna, Yann-Hang Lee:
VLSI Circuit Testing Using an Adaptive Optimization Model.
399-406
Electronic Edition (ACM DL) BibTeX
- Andrzej Krasniewski, Slawomir Pilarski:
Circular Self-Test Path: A Low-Cost BIST Technique.
407-415
Electronic Edition (ACM DL) BibTeX
- John J. Granacki Jr., Alice C. Parker:
PHRAN-SPAN: A Natural Language Interface for System Specifications.
416-422
Electronic Edition (ACM DL) BibTeX
- W. Lee, G. Liu, K. Peterson:
TED: A Graphical Technology Description Editor.
423-428
Electronic Edition (ACM DL) BibTeX
- W. Lee:
"?": A Context-Sensitive Help System Based on Hypertext.
429-435
Electronic Edition (ACM DL) BibTeX
- R. K. Chun, K.-J. Chang, Lawrence P. McNamee:
VISION: VHDL Induced Schematic Imaging on Net-Lists.
436-442
Electronic Edition (ACM DL) BibTeX
- D. L. Johannsen, S. K. Tsubota, K. McElvain:
An Intelligent Compiler Subsystem for a Silicon Compiler.
443-450
Electronic Edition (ACM DL) BibTeX
- Bertrand Serlet:
Fast, Small, and Static Combinatorial CMOS Circuits.
451-458
Electronic Edition (ACM DL) BibTeX
- P. A. Subrahmanyam:
LCS - A Leaf Cell Synthesizer Employing Formal Deduction Techniques.
459-465
Electronic Edition (ACM DL) BibTeX
- J. S. J. Chen, D. Y. Chen:
A Design Rule Independent Cell Compiler.
466-471
Electronic Edition (ACM DL) BibTeX
- M. Shahdad:
An Interface between VHDL and EDIF.
472-478
Electronic Edition (ACM DL) BibTeX
- C. H. Parks:
Tutorial: Reading and Reviewing the Common Schema for Electrical Design and Analysis.
479-483
Electronic Edition (ACM DL) BibTeX
- L. F. Saunders:
The IBM VHDL Design System.
484-490
Electronic Edition (ACM DL) BibTeX
- J. Hines:
Where VHDL Fits Within the CAD Environment.
491-494
Electronic Edition (ACM DL) BibTeX
- Susheel J. Chandra, Janak H. Patel:
A Hierarchical Approach Test Vector Generation.
495-501
Electronic Edition (ACM DL) BibTeX
- Tom E. Kirkland, M. Ray Mercer:
A Topological Search Algorithm for ATPG.
502-508
Electronic Edition (ACM DL) BibTeX
- M. Ladjadj, J. F. McDonald:
Benchmark Runs of the Subscripted D-Algorithm with Observation Path Mergers on the Brglez-Fujiwara Circuits.
509-515
Electronic Edition (ACM DL) BibTeX
- Robert Michael Owens, Mary Jane Irwin:
An Overview of the Penn State Design System.
516-522
Electronic Edition (ACM DL) BibTeX
- Shigenobu Suzuki, Tatsushige Bitoh, Masao Kakimoto, Kazutoshi Takahashi, Takao Sugimoto:
TRIP: An Automated Technology Mapping System.
523-529
Electronic Edition (ACM DL) BibTeX
- T. Ogihara, H. Toyoshima, S. Murai:
ASTA: LSI Design Management System.
530-536
Electronic Edition (ACM DL) BibTeX
- D. F. Wong, C. L. Liu:
Array Optimization for VLSI Synthesis.
537-543
Electronic Edition (ACM DL) BibTeX
- R. L. Maiasz, John P. Hayes:
Layout Optimization of CMOS Functional Cells.
544-551
Electronic Edition (ACM DL) BibTeX
- Y.-C. Chang, S. C. Chang, L.-H. Hsu:
Automated Layout Generation Using Gate Matrix Approach.
552-558
Electronic Edition (ACM DL) BibTeX
- Ronald Waxman:
The Design Automation Standards Environment.
559-561
Electronic Edition (ACM DL) BibTeX
- L. O'Connell:
Design Automation Standards Need Integration.
562-562
Electronic Edition (ACM DL) BibTeX
- R. J. Pachter:
Design Automation Standards - Perspectives from a Down-the-Road End User.
563-564
Electronic Edition (ACM DL) BibTeX
- M. L. Brei:
Needed: A Meta-Language for Evaluating the Expressiveness of EDIF, IGES, VHDL and Other Representation Mechanisms.
565-565
Electronic Edition (ACM DL) BibTeX
- Shun-Lin Su, Vasant B. Rao, Timothy N. Trick:
HPEX: A Hierarchical Parasitic Circuit Extractor.
566-569
Electronic Edition (ACM DL) BibTeX
- Don Stark, Mark Horowitz:
RED: Resistance Extraction for Digital Simulation.
570-573
Electronic Edition (ACM DL) BibTeX
- Jung-Gen Wu, William P.-C. Ho, Yu Hen Hu, David Y. Y. Yun, H. J. Yu:
Function Search from Behavioral Description of a Digital System.
574-579
Electronic Edition (ACM DL) BibTeX
- C. Kingsley:
The Implementation of a State Machine Compiler.
580-583
Electronic Edition (ACM DL) BibTeX
- Edward P. Stabler, H. Bingol:
Boolean Comparison by Simulation.
584-587
Electronic Edition (ACM DL) BibTeX
- Larry Soulé, R. Blank:
Statistics for Parallelism and Abstraction Level in Digital Simulation.
588-591
Electronic Edition (ACM DL) BibTeX
- Steven S. Leung, Michael A. Shanblatt:
A Conceptual Framework for Designing ASIC Hardware.
592-595
Electronic Edition (ACM DL) BibTeX
- Dick C. A. Bulterman:
CASE: An Integrated Design Environment for Algorithm-Driven Architectures.
596-599
Electronic Edition (ACM DL) BibTeX
- R. Galivanche, Sudhakar M. Reddy:
A Parallel PLA Minimization Program.
600-607
Electronic Edition (ACM DL) BibTeX
- Chidchanok Lursinsap, Daniel Gajski:
Improving a PLA Area by Pull-Up Transistor Folding.
608-614
Electronic Edition (ACM DL) BibTeX
- L. B. Nguyen, M. A. Perkowdki, N. B. Goldstein:
PALMINI - Fast Boolean Minimizer for Personal Computers.
615-621
Electronic Edition (ACM DL) BibTeX
- Chin-Long Wey:
On Yield Consideration for the Design of Redundant Programmable Logic Arrays.
622-628
Electronic Edition (ACM DL) BibTeX
- D. Kaplan:
Routing with a Scanning Window-8Ma Unified Approach.
629-632
Electronic Edition (ACM DL) BibTeX
- C. H. Ng:
A "gridless" Variable-Width Channel Router for Marco Cell Design.
633-636
Electronic Edition (ACM DL) BibTeX
- Richard J. Enbody, H. C. Du:
General Purpose Router.
637-640
Electronic Edition (ACM DL) BibTeX
- Y. C. Hsu, Y. Pan, William J. Kubitz:
A Path Selection Global Router.
641-644
Electronic Edition (ACM DL) BibTeX
- P. C. Shah, Hosaker N. Mahabala:
A New Compaction Scheme Based on Compression Ridges.
645-648
Electronic Edition (ACM DL) BibTeX
- Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof:
Hierarchical Design Based on a Calculus of Nets.
649-653
Electronic Edition (ACM DL) BibTeX
- E. F. M. Kouka, Gabriele Saucier:
An Application of Exploratory Data Analysis Techniques to Floorplan Design.
654-658
Electronic Edition (ACM DL) BibTeX
- W.-J. Lue, Lawrence P. McNamee:
PLAY: Pattern-Based Symbolic Cell Layout: Part I: Transistor Placement.
659-665
Electronic Edition (ACM DL) BibTeX
- T. Cesear, E. Iodice, C. Tsareff:
PAMS: An Expert System for Parameterized Module Synthesis.
666-671
Electronic Edition (ACM DL) BibTeX
- Y.-L. S. Lin, Daniel Gajski:
LES: A Layout Expert System.
672-678
Electronic Edition (ACM DL) BibTeX
- R. L. Steele:
An Expert System Application in Semicustom VLSI Design.
679-688
Electronic Edition (ACM DL) BibTeX
- Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs:
Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories.
689-694
Electronic Edition (ACM DL) BibTeX
- Balakrishnan Krishnamurthy:
A Dynamic Programming Approach to the Test Point Insertion Problem.
695-705
Electronic Edition (ACM DL) BibTeX
- D. Praizler, G. Fritz:
A Parts Selection Expert System to Increase Manufacturability.
706-712
Electronic Edition (ACM DL) BibTeX
- J. Y. Tou, W. H. Ki, K. C. Fan, C. L. Huang:
Knowledge Based Approach for the Verification of CAD Database Generated by an Automated Schematic Capture System.
713-720
Electronic Edition (ACM DL) BibTeX
- E. Rosenberg:
A New Interactive Supply/Demand Router with Rip-Up Capability for Printed Circuit Boards.
721-726
Electronic Edition (ACM DL) BibTeX
- Jeremy Dion:
Fast Printed Circuit Board Routing.
727-734
Electronic Edition (ACM DL) BibTeX
- R. Forbes:
Heuristic Acceleration of Force-Directed Placement.
735-740
Electronic Edition (ACM DL) BibTeX
- J. D. Morison, N. E. Peeling, T. L. Thorp, E. V. Whiting:
EASE: A Design Support Environment for the HDDL ELLA.
741-749
Electronic Edition (ACM DL) BibTeX
- L.-P. Demers, P. Jacques, S. Fauvel, Eduard Cerny:
CHESHIRE: An Object-Oriented Integration of VLSI CAD Tools.
750-756
Electronic Edition (ACM DL) BibTeX
- Emil F. Girczyc, Tai A. Ly:
STEM: An IC Design Environment Based on the Smalltalk Model-View-Controller Construct.
757-763
Electronic Edition (ACM DL) BibTeX
- Anthony J. Gadient, J. L. Ebel:
Rational for and Organization of the Engineering Information System Program.
764-769
Electronic Edition (ACM DL) BibTeX
- Ali A. Minai, Ronald D. Williams, F. W. Blake:
A Discrete Heuristics Approach to Predictive Evaluation of Semi-Custom IC Layouts.
770-776
Electronic Edition (ACM DL) BibTeX
- Gotaro Odawara, T. Hamuro, Kazuhiko Iijima, T. Yoshino, Y. Dai:
A Rule-Based Placement System for Printed Wiring Boards.
777-785
Electronic Edition (ACM DL) BibTeX
- Ching-Farn Eric Wu, Anthony S. Wojcik, Lionel M. Ni:
A Rule-Based Circuit Representation for Automated CMOS Design and Verification.
786-792
Electronic Edition (ACM DL) BibTeX
- T. D. Spiers, D. A. Edwards:
A High Performance Routing Engine.
793-799
Electronic Edition (ACM DL) BibTeX
- Youngju Won, Sartaj Sahni, Yacoub M. El-Ziq:
A Hardware Accelerator for Maze Routing.
800-806
Electronic Edition (ACM DL) BibTeX
- M. Jones, Prithviraj Banerjee:
Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube.
807-813
Electronic Edition (ACM DL) BibTeX
- Kunle Olukotun, Trevor N. Mudge:
A Preliminary Investigation into Parallel Routing on a Hypercube Computer.
814-820
Electronic Edition (ACM DL) BibTeX
- Richard H. Lathrop, Robert J. Hall, Robert S. Kirk:
Functional Abstraction from Structure in VLSI Simulation Models.
822-828
Electronic Edition (ACM DL) BibTeX
- S. Koeppe:
Optimal Layout to Avoid CMOS Stuck-Open Faults.
829-835
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:04:35 2009
by Michael Ley (ley@uni-trier.de)
