2007 |
16 | EE | Zhengyong Zhu,
He Peng,
Chung-Kuan Cheng,
Khosro Rouz,
Manjit Borah,
Ernest S. Kuh:
Two-Stage Newton-Raphson Method for Transistor-Level Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 881-895 (2007) |
2005 |
15 | EE | Zhengyong Zhu,
Khosro Rouz,
Manjit Borah,
Chung-Kuan Cheng,
Ernest S. Kuh:
Efficient transient simulation for transistor-level analysis.
ASP-DAC 2005: 240-243 |
1999 |
14 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
A Fast and Simple Steiner Routing Heuristic.
Discrete Applied Mathematics 90(1-3): 51-67 (1999) |
1998 |
13 | | Cyrus Bamji,
Manjit Borah:
An Improved Cost Heuristic for Transistor Sizing.
VLSI Design 1998: 534- |
1997 |
12 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
A fast algorithm for minimizing the Elmore delay to identified critical sinks.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 753-759 (1997) |
1996 |
11 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Recent Developments in Performance Driven Steiner Routing: An Overview.
Great Lakes Symposium on VLSI 1996: 137-142 |
10 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Transistor sizing for low power CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 665-671 (1996) |
9 | EE | Manjit Borah,
Chetana Nagendra,
Mohan Vishwanath,
Robert Michael Owens,
Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh.
VLSI Signal Processing 13(1): 67-75 (1996) |
1995 |
8 | EE | Huzefa Mehta,
Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Accurate Estimation of Combinational Circuit Activity.
DAC 1995: 618-622 |
7 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Fast algorithm for performance-oriented Steiner routing.
Great Lakes Symposium on VLSI 1995: 198-203 |
6 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
High-throughput and low-power DSP using clocked-CMOS circuitry.
ISLPD 1995: 139-144 |
5 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint.
ISLPD 1995: 167-172 |
4 | EE | Manjit Borah,
Mary Jane Irwin,
Robert Michael Owens:
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering.
VLSI Design 1995: 294-298 |
1994 |
3 | | Manjit Borah,
Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS.
HICSS (1) 1994: 96-104 |
2 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
An edge-based heuristic for Steiner routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1563-1568 (1994) |
1992 |
1 | | Gautam Barua,
Manjit Borah:
Integrity and Security Issues in Multisignature Document Mailing Systems.
NETWORKS 1992: 193-198 |