ISVLSI 2003:
Tampa,
Florida,
USA
2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA.
IEEE Computer Society 2003, ISBN 0-7695-1904-0 BibTeX
@proceedings{DBLP:conf/isvlsi/2003,
title = {2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003),
New Trends and Technologies for VLSI Systems Design, 20-21 February
2003, Tampa, FL, USA},
booktitle = {ISVLSI},
publisher = {IEEE Computer Society},
year = {2003},
isbn = {0-7695-1904-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Full Papers
Emerging Trends in VLSI Systems
Advanced VLSI Design
VLSI Circuits and Systems
System-on-a-Chip Design
System Level Design
Low Power VLSI System Design I
Low Power VLSI System Design II
- Robert Bai, Sarvesh H. Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David Blaauw:
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.
149-154
Electronic Edition (link) BibTeX
- Maciej Bellos, Dimitri Kagaris, Dimitris Nikolos:
Low Power Test Set Embedding Based on Phase Shifters.
155-160
Electronic Edition (link) BibTeX
- W. Kuang, J. S. Yuan, Abdel Ejnioui:
Supply Voltage Scalable System Design Using Self-Timed Circuits.
161-166
Electronic Edition (link) BibTeX
- Ravishankar Arunachalam, Emrah Acar, Sani R. Nassif:
Optimal shielding/spacing metrics for low power design.
167-172
Electronic Edition (link) BibTeX
- Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Kyu-won Choi, Abhijit Chatterjee:
An O(N)Supply Voltage Assignment Algorithm for Low-Energy Serially Connected CMOS Modules and a Heuristic Extension to Acyclic Data Flow Graphs.
173-182
Electronic Edition (link) BibTeX
Physical Design,
Synthesis and Optimization
Poster Papers
- Sumeer Goel, Tarek Darwish, Magdy A. Bayoumi:
A Novel Technique for Noise-Tolerance in Dynamic Circuits.
203-206
Electronic Edition (link) BibTeX
- Shang Xue, Bengt Oelmann:
Efficient VLSI Implementation of a VLC Decoder for Universal Variable Length Code.
207-208
Electronic Edition (link) BibTeX
- Hanho Lee:
An Area-Efficient Euclidean Algorithm Block for Reed-Solomon Decoder.
209-210
Electronic Edition (link) BibTeX
- Chandramouli Gopalakrishnan, Srinivas Katkoori:
An Architectural Leakage Power Simulator for VHDL Structural Datapaths.
211-212
Electronic Edition (link) BibTeX
- Ming-Jung Seow, Hau T. Ngo, Vijayan K. Asari:
Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association.
213-214
Electronic Edition (link) BibTeX
- Satish Ravichandran, Vijayan K. Asari:
Pre-computatio of Rotatio Bits in Unidirectional CORDIC for Trigonometric and Hyperbolic Computations.
215-216
Electronic Edition (link) BibTeX
- Jung-Lin Yang, Erik Brunvand:
Self-Timed Design with Dynamic Domino Circuits.
217-219
Electronic Edition (link) BibTeX
- Jiangjiang Liu, Nihar R. Mahapatra, Krishnan Sundaresan:
Hardware-Only Compression to Reduce Cost and Improve Utilization of Address Buses.
220-221
Electronic Edition (link) BibTeX
- Marc Leeman, Chantal Ykman-Couvreur, David Atienza, Vincenzo De Florio, Geert Deconinck:
Automated Dynamic Memory Data Type Implementation Exploration and Optimization.
222-224
Electronic Edition (link) BibTeX
- Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson, Lars J. Svensson:
Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects.
225-230
Electronic Edition (link) BibTeX
- Andrea Lodi, Luca Ciccarelli, Andrea Cappelli, Fabio Campi, Mario Toma:
Decoder-Based Multi-Context Interconnect Architecture.
231-233
Electronic Edition (link) BibTeX
- Ioannis Papaefstathiou:
Titan II : An IPComp Processor for 10Gbit/sec networks.
234-235
Electronic Edition (link) BibTeX
- Hyung-Jin Lee, Dong Sam Ha:
Frequency Domain Approach for CMOS Ultra-Wideband Radios.
236-237
Electronic Edition (link) BibTeX
- W. Rhett Davis:
Getting High-Performance Silicon from System-Level Design.
238-243
Electronic Edition (link) BibTeX
- Bassam Shaer, Kailash Aurangabadkar, Nitin Agarwal:
Testable Sequential Circuit Design: Partitioning for Pseudoexhaustive Test.
244-245
Electronic Edition (link) BibTeX
- Shalini Ghosh, Sugato Basu, Nur A. Touba:
Joint Minimization of Power and Area in Scan Testing by Scan Cell Reordering.
246-249
Electronic Edition (link) BibTeX
- Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii:
Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization.
250-251
Electronic Edition (link) BibTeX
- M. Madhu, V. Srinivasa Murty, V. Kamakoti:
Dynamic Coding Technique For Low-Power Data Bus.
252-253
Electronic Edition (link) BibTeX
- Hongping Li, John K. Antonio, Sudarshan K. Dhall:
Fast and Precise Power Prediction for Combinational Circuits.
254-259
Electronic Edition (link) BibTeX
- Jia Di, Jiann S. Yuan, Ronald F. DeMara:
High Throughput Power-Aware FIR Filter Design Based on Fine-Grain Pipelining Multipliers and Adders.
260-261
Electronic Edition (link) BibTeX
- Krishnan Sundaresan, Nihar R. Mahapatra:
Code Compression Techniques for Embedded Systems and Their Effectiveness.
262-263
Electronic Edition (link) BibTeX
- Sandeep K. Kondapuram, Peter M. Maurer:
Random Characterization of Design Automation Algorithms.
264-265
Electronic Edition (link) BibTeX
- Hua Tang, Hui Zhang, Alex Doboli:
Layout-Aware Analog System Synthesis Based on Symbolic Layout Description and Combined Block Parameter Exploration, Placement and Global Routing.
266-271
Electronic Edition (link) BibTeX
- Jihong Ren, Mark R. Greenstreet:
Equalizing Filter Design for Crosstalk Cancellation.
272-274
Electronic Edition (link) BibTeX
- Jan Lundgren, Bengt Oelmann, Trond Ytterdal, Patrik Eriksson, Munir Abdalla, Mattias O'Nils:
Behavioral Simulation of Power Line Noise Coupling in Mixed-Signal Systems using SystemC.
275-277
Electronic Edition (link) BibTeX
- Li Yang, J. S. Yuan:
Enhanced Techniques for Current Balanced Logic in Mixed-Signal ICs.
278-279
Electronic Edition (link) BibTeX
- Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi:
Quantum Voltage Comparator for 0.07 mum CMOS Flash A/D Converters.
280-282
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:26:35 2009
by Michael Ley (ley@uni-trier.de)