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Prasanth Mangalagiri

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2008
6EEPrasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim: A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398
5EEPrasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan: Thermal-aware reliability analysis for platform FPGAs. ICCAD 2008: 722-727
4EESuresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari: Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Sec. Comput. 5(2): 115-127 (2008)
2007
3EEJungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijay Narayanan, K. Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun: TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms. FPL 2007: 68-73
2EESuresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan: FPGA routing architecture analysis under variations. ICCD 2007: 152-157
2006
1EESuresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari: FLAW: FPGA lifetime awareness. DAC 2006: 630-635

Coauthor Index

1Sungmin Bae [5]
2Chaitali Chakrabarti [3]
3Lanping Deng [3]
4Kevin M. Irick [3]
5Mary Jane Irwin [4] [6]
6Mahmut T. Kandemir [3]
7Osama Awadel Karim [6]
8Jungsub Kim [3]
9Vijay Narayanan [3]
10Nikos Pitsianis [3]
11Krishnan Ramakrishnan [4] [5]
12Karthik Sarpatwari [1] [4] [6]
13K. Sobti [3]
14Suresh Srinivasan [1] [2] [4]
15Xiaobai Sun [3]
16Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [1] [2] [4] [5] [6]
17Yuan Xie [1] [2] [4] [5] [6]
18Aditya Yanamandra [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)