CASES 2001: Atlanta, Georgia, USA

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), November 16-17, 2001, Atlanta, Georgia, USA. ACM, 2001

Caches and Memory Systems

Alberto L. Sangiovanni-Vincentelli, Grant Martin:
A vision for embedded software. 1-7
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Harry Dwyer, John Fernando:
Establishing a tight bound on task interference in embedded system instruction caches. 8-14
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Jan Sjödin, Carl von Platen:
Storage allocation for embedded processors. 15-23
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Timothy Sherwood, Brad Calder:
Patchable instruction ROM architecture. 24-33
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Oren Avissar, Rajeev Barua, Dave Stewart:
Heterogeneous memory management for embedded systems. 34-43
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Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob:
Transparent data-memory organizations for digital signal processors. 44-48
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Compilers and Optimization

K. Schneider, M. Wenz:
A new method for compiling schizophrenic synchronous programs. 49-58
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Björn Franke, Michael F. P. O'Boyle:
An empirical evaluation of high level transformations for embedded processors. 59-66
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Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu:
Combined partitioning and data padding for scheduling multiple loop nests. 67-75
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Olaf Lüthje, Martin Coors, Holger Keding:
A novel approach to code analysis of digital signal processing systems. 76-83
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Sungjoon Jung, Yunheung Paek:
The very portable optimizer for digital signal processors. 84-92
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Synthesis and Design Tools

Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
A software development tool chain for a reconfigurable processor. 93-98
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Michael Ward, Neil C. Audsley:
Hardware compilation of sequential Ada. 99-107
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Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies:
Design space characterization for architecture/compiler co-exploration. 108-115
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Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm:
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. 116-125
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Adam Johnson, Kenneth Mackenzie:
Pattern matching in reconfigurable logic for packet classification. 126-130
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Hardware Support

Friedhelm Stappert, Andreas Ermedahl, Jakob Engblom:
Efficient longest executable path search for programs with complex flows and pipeline effects. 132-140
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Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo:
Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. 141-148
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Bilge Saglam Akgul, Jaehwan Lee, Vincent John Mooney III:
A system-on-a-chip lock cache with task preemption support. 149-157
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Shail Aditya, Michael S. Schlansker:
ShiftQ: a bufferred interconnect for custom loop accelerators. 158-167
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Heidi Pan, Krste Asanovic:
Heads and tails: a variable-length instruction format supporting parallel fetch and decode. 168-175
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Power Management

Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong:
The emerging power crisis in embedded processors: what can a poor compiler do? 176-180
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Christopher T. Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin:
Application specific architectures: a recipe for fast, flexible and power efficient designs. 181-185
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Electronic Textiles

Sungmee Park, Sundaresan Jayaraman:
Textiles and computing: background and opportunities for convergence. 186-187
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Kenneth Mackenzie, Eric Hudson, Drew Maule, Sundaresan Jayaraman, Sungmee Park:
A prototype network embedded in textile fabric. 188-194
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Power-and Energy-Aware Computing

Anil Seth, Ravindra B. Keskar, R. Venugopal:
Algorithms for energy optimization using processor instructions. 195-202
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Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob:
The performance and energy consumption of three embedded real-time operating systems. 203-210
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Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu:
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads. 211-220
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Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna:
EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems. 221-228
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Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement. 229-237
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Zhiyuan Li, Cheng Wang, Rong Xu:
Computation offloading to save energy on handheld devices: a partition scheme. 238-246
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