2008 |
31 | EE | Liang-Bi Chen,
Yung-Chih Liu,
Chen-Hung Chen,
Chung-Fu Kao,
Ing-Jer Huang:
Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor.
ASP-DAC 2008: 117-118 |
30 | EE | Yi-Ting Lin,
Wen-Chi Shiue,
Ing-Jer Huang:
A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer.
DAC 2008: 862-865 |
29 | EE | Fu-Ching Yang,
Jing-Kun Zhong,
Ing-Jer Huang:
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus.
ICCAD 2008: 372-377 |
28 | EE | Yi-Ting Lin,
Chien-Chou Wang,
Ing-Jer Huang:
AMBA AHB bus potocol checker with efficient debugging mechanism.
ISCAS 2008: 928-931 |
27 | EE | Fu-Ching Yang,
Wen-Kai Huang,
Jing-Kun Zhong,
Ing-Jer Huang:
Automatic Verification of External Interrupt Behaviors for Microprocessor Design.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1670-1683 (2008) |
2007 |
26 | EE | Chung-Fu Kao,
Chi-Hung Lin,
Ing-Jer Huang:
Configurable AMBA On-Chip Real-Time Signal Tracer.
ASP-DAC 2007: 114-115 |
25 | EE | Fu-Ching Yang,
Ing-Jer Huang:
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools.
ASP-DAC 2007: 902-907 |
24 | EE | Chung-Fu Kao,
Ing-Jer Huang,
Chi-Hung Lin:
An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration.
DAC 2007: 477-482 |
23 | EE | Fu-Ching Yang,
Wen-Kai Huang,
Ing-Jer Huang:
Automatic Verification of External Interrupt Behaviors for Microprocessor Design.
DAC 2007: 896-901 |
22 | EE | Tse-Chen Yeh,
Tsung-Yu Ho,
Hung-Yu Chen,
Ing-Jer Huang:
SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics.
EUC 2007: 531-540 |
2006 |
21 | EE | Liang-Bi Chen,
Ing-Jer Huang,
Yuan-Long Jeang:
Design of a Dynamic PCM Selector for Non-deterministic Environment.
APCCAS 2006: 1124-1127 |
2005 |
20 | EE | Wen-Kai Huang,
I-Ting Lin,
Shi-Wei Chen,
Ing-Jer Huang:
A cost-effective media processor for embedded applications [audio decoder example].
ISCAS (6) 2005: 6122-6125 |
2003 |
19 | EE | Ing-Jer Huang,
Dao-Zhen Chen:
Automatic Assembly Program Retargeting for Micrco controllers.
J. Inf. Sci. Eng. 19(5): 717-743 (2003) |
18 | EE | Ing-Jer Huang,
Dao-Zhen Chen:
Mining Correlations of Human Gene Expression from Digital Gene Expression Profiles.
J. Inf. Sci. Eng. 19(6): 909-921 (2003) |
2002 |
17 | EE | Ing-Jer Huang,
Chung-Fu Kao,
Hsin-Ming Chen,
Ching-Nan Juan,
Tai-An Lu:
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors.
IEEE Design & Test of Computers 19(4): 28-38 (2002) |
16 | EE | Ing-Jer Huang,
Ping-Huei Xie:
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors.
IEEE Trans. VLSI Syst. 10(1): 44-54 (2002) |
2001 |
15 | EE | Ming-Chih Chen,
Ing-Jer Huang,
Chung-Ho Chen:
Parameterized MAC unit implementation.
ASP-DAC 2001: 23-24 |
14 | EE | Ing-Jer Huang,
Hsin-Ming Chen,
Chung-Fu Kao:
Reusable embedded in-circuit emulator.
ASP-DAC 2001: 33-34 |
13 | EE | Ing-Jer Huang:
Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors.
ACM Trans. Design Autom. Electr. Syst. 6(1): 93-121 (2001) |
2000 |
12 | EE | Ing-Jer Huang,
Dao-Zhen Chen:
A new approach to assembly software retargeting for microcontrollers.
ASP-DAC 2000: 229-234 |
1999 |
11 | EE | Ing-Jer Huang,
Tai-An Lu:
ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers.
DAC 1999: 580-585 |
10 | EE | Ing-Jer Huang,
Li-Rong Wang:
Automatic Simulation and Verification of Pipelined Microcontrollers.
J. Inf. Sci. Eng. 15(2): 307-320 (1999) |
1998 |
9 | EE | Ing-Jer Huang,
Ping-Huei Xie:
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation.
ISSS 1998: 131-136 |
8 | EE | Ing-Jer Huang:
A Case Study: Synthesis and Exploration of Instruction Set Design for Application-Specific Symbolic Computing.
J. Inf. Sci. Eng. 14(4): 821-842 (1998) |
1995 |
7 | EE | Ing-Jer Huang,
Alvin M. Despain:
Synthesis of application specific instruction sets.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 663-675 (1995) |
1994 |
6 | EE | Ing-Jer Huang,
Alvin M. Despain:
Synthesis of Instruction Sets for Pipelined Microprocessors.
DAC 1994: 5-11 |
5 | EE | Ing-Jer Huang,
Alvin M. Despain:
Generating instruction sets and microarchitectures from applications.
ICCAD 1994: 391-396 |
1993 |
4 | EE | Ing-Jer Huang,
Alvin M. Despain:
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors.
ICCAD 1993: 594-599 |
3 | EE | Ing-Jer Huang,
Alvin M. Despain:
An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors.
MICRO 1993: 236-246 |
1992 |
2 | EE | Ing-Jer Huang,
Alvin M. Despain:
High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers.
DAC 1992: 135-140 |
1 | EE | Iksoo Pyo,
Ching-Long Su,
Ing-Jer Huang,
Kuo-Rueih Pan,
Yong-Seon Koh,
Chi-Ying Tsui,
Hsu-Tsun Chen,
Gino Cheng,
Shihming Liu,
Shiqun Wu,
Alvin M. Despain:
Application-Driven Design Automation for Microprocessor Design.
DAC 1992: 512-517 |