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| 2000 | ||
|---|---|---|
| 2 | EE | Takahiro Miomo, Koichi Yasuoka, Masanori Kanazawa: The Fastest Multiplier on FPGAs with Redundant Binary Representation. FPL 2000: 515-524 |
| 1993 | ||
| 1 | EE | Hiroyuki Ochi, Koichi Yasuoka, Shuzo Yajima: Breadth-first manipulation of very large binary-decision diagrams. ICCAD 1993: 48-55 |
| 1 | Masanori Kanazawa | [2] |
| 2 | Takahiro Miomo | [2] |
| 3 | Hiroyuki Ochi | [1] |
| 4 | Shuzo Yajima | [1] |