1996 |
5 | EE | Nguyen-Ngoc Bình,
Masaharu Imai,
Akichika Shiomi,
Nobuyuki Hikichi:
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts.
DAC 1996: 527-532 |
1995 |
4 | EE | Nguyen-Ngoc Bình,
Masaharu Imai,
Akichika Shiomi,
Nobuyuki Hikichi:
A hardware/software codesign method for pipelined instruction set processor using adaptive database.
ASP-DAC 1995 |
3 | EE | Binh Ngoc Nguyen,
Masaharu Imai,
Nobuyuki Hikichi:
A hardware/software partitioning algorithm for pipelined instruction set processor.
EURO-DAC 1995: 176-181 |
1993 |
2 | EE | Alauddin Alomary,
Takeharu Nakata,
Yoshimichi Honma,
Masaharu Imai,
Nobuyuki Hikichi:
An ASIP instruction set optimization algorithm with functional module sharing constraint.
ICCAD 1993: 526-532 |
1991 |
1 | | Jun Sato,
Masaharu Imai,
Tetsuya Hakata,
Alauddin Y. Alomary,
Nobuyuki Hikichi:
An Integrated Design Environment for Application Specific Integrated Processor.
ICCD 1991: 414-417 |