| 1998 |
|---|
| 18 | EE | Kevin J. Kerns,
Andrew T. Yang:
Preservation of passivity during RLC network reduction via split congruence transformations.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(7): 582-591 (1998) |
| 1997 |
|---|
| 17 | EE | Kevin J. Kerns,
Andrew T. Yang:
Preservation of Passivity During RLC Network Reduction via Split Congruence Transformations.
DAC 1997: 34-39 |
| 16 | EE | Kevin J. Kerns,
Andrew T. Yang:
Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 734-744 (1997) |
| 1996 |
|---|
| 15 | EE | Kevin J. Kerns,
Andrew T. Yang:
Stable and Efficient Reduction of Large, Multiport RC Networks by Pole Analysis via Congruence Transformations.
DAC 1996: 280-285 |
| 14 | EE | Steven D. Corey,
Andrew T. Yang:
Automatic netlist extraction for measurement-based characterization of off-chip interconnect.
ICCAD 1996: 24-29 |
| 1995 |
|---|
| 13 | EE | Ivan L. Wemple,
Andrew T. Yang:
Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels.
DAC 1995: 439-444 |
| 12 | EE | Kevin J. Kerns,
Ivan L. Wemple,
Andrew T. Yang:
Stable and efficient reduction of substrate model networks using congruence transforms.
ICCAD 1995: 207-214 |
| 11 | EE | Ivan L. Wemple,
Andrew T. Yang:
Integrated circuit substrate coupling models based on Voronoi tessellation.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(12): 1459-1469 (1995) |
| 10 | EE | Julie Chen,
Andrew T. Yang:
STYLE: a statistical design approach based on nonparametric performance macromodeling.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 794-802 (1995) |
| 1994 |
|---|
| 9 | EE | Andrew T. Yang,
Yu Liu,
Jack T. Yao:
An efficient nonquasi-static diode model for circuit simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(2): 231-239 (1994) |
| 1993 |
|---|
| 8 | EE | Andrew T. Yang,
Yu Liu,
Jack T. Yao,
R. R. Daniels:
An Efficient Non-Quasi-Static Diode Model for Circuit Simulation.
DAC 1993: 720-725 |
| 7 | EE | Julie Chen,
Andrew T. Yang:
Style: a technology-independent approach to statistical design.
ICCAD 1993: 210-214 |
| 6 | EE | Andrew T. Yang,
Yu-Hsu Chang,
Daniel G. Saab,
Ibrahim N. Hajj:
Switch-level timing simulation of bipolar ECL circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(4): 516-530 (1993) |
| 1992 |
|---|
| 5 | EE | Yu-Hsu Chang,
Andrew T. Yang:
Analytic macromodeling and simulation fo tightly-coupled mixed analog-digital circuits.
ICCAD 1992: 244-247 |
| 1991 |
|---|
| 4 | EE | Andrew T. Yang,
C. H. Chan,
Jack T. Yao,
R. R. Daniels,
J. P. Harrang:
Modeling and Simulation of High-Frequency Integrated Circuits Based on Scattering Parameters.
DAC 1991: 752-757 |
| 3 | | Andrew T. Yang,
Yu-Hsu Chang:
Bipolar Timing Modeling Including Interconnects Based on Parametric Correction.
ICCAD 1991: 354-357 |
| 1989 |
|---|
| 2 | EE | Andrew T. Yang,
S. M. Kang:
iSMILE: A Novel Circuit Simulation Program with Emphasis on New Device Model Development.
DAC 1989: 630-633 |
| 1988 |
|---|
| 1 | EE | Daniel G. Saab,
Andrew T. Yang,
Ibrahim N. Hajj:
Delay Modeling and Time of Bipolar Digital Circuits.
DAC 1988: 288-293 |
