2009 | ||
---|---|---|
80 | EE | Chaomei Chen, Yue Chen, Mark Horowitz, Haiyan Hou, Zeyuan Liu, Don Pellegrino: Towards an explanatory and computational theory of scientific discovery CoRR abs/0904.1439: (2009) |
2008 | ||
79 | EE | Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz: Processor Performance Modeling using Symbolic Simulation. ISPASS 2008: 127-138 |
78 | EE | Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin Firoozshahian, Stephen Richardson, Mark Horowitz: Verification of chip multiprocessor memory systems using a relaxed scoreboard. MICRO 2008: 294-305 |
77 | EE | Robert Kunz, Mark Horowitz: The case for simple, visible cache coherency. MSPC 2008: 31-35 |
76 | EE | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparative evaluation of memory models for chip multiprocessors. TACO 5(3): (2008) |
2007 | ||
75 | EE | Alex Solomatnikov, Amin Firoozshahian, Wajahat Qadeer, Ofer Shacham, Kyle Kelley, Zain Asgar, Megan Wachs, Rehan Hameed, Mark Horowitz: Chip Multi-Processor Generator. DAC 2007: 262-263 |
74 | EE | Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman: Robust Energy-Efficient Adder Topologies. IEEE Symposium on Computer Arithmetic 2007: 16-28 |
73 | EE | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparing memory systems for chip multiprocessors. ISCA 2007: 358-368 |
72 | EE | Mark Horowitz: Scaling, Power and the Future of CMOS. VLSI Design 2007: 23 |
71 | EE | Eino-Ville Talvala, Andrew Adams, Mark Horowitz, Marc Levoy: Veiling glare in high dynamic range imaging. ACM Trans. Graph. 26(3): 37 (2007) |
2006 | ||
70 | EE | Marc Levoy, Ren Ng, Andrew Adams, Matthew Footer, Mark Horowitz: Light field microscopy. ACM Trans. Graph. 25(3): 924-934 (2006) |
2005 | ||
69 | EE | Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd: A New Method for Design of Robust Digital Circuits. ISQED 2005: 676-681 |
68 | EE | Pradeep Sen, Billy Chen, Gaurav Garg, Stephen R. Marschner, Mark Horowitz, Marc Levoy, Hendrik P. A. Lensch: Dual photography. ACM Trans. Graph. 24(3): 745-755 (2005) |
67 | EE | Bennett Wilburn, Neel Joshi, Vaibhav Vaish, Eino-Ville Talvala, Emilio R. Antúnez, Adam Barth, Andrew Adams, Mark Horowitz, Marc Levoy: High performance imaging using large camera arrays. ACM Trans. Graph. 24(3): 765-776 (2005) |
66 | EE | Ken Tseng, Mark Horowitz: False coupling exploration in timing analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 24(11): 1795-1805 (2005) |
65 | EE | Ghazi Al-Rawi, John M. Cioffi, Mark Horowitz: On task mapping optimization for parallel decoding of low-density parity-check codes on message-passing architectures. Parallel Computing 31(5): 462-490 (2005) |
2004 | ||
64 | EE | Bennett Wilburn, Neel Joshi, Vaibhav Vaish, Marc Levoy, Mark Horowitz: High-Speed Videography Using a Dense Camera Array. CVPR (2) 2004: 294-301 |
63 | EE | Francois Labonte, Peter R. Mattson, William Thies, Ian Buck, Christos Kozyrakis, Mark Horowitz: The Stream Virtual Machine. IEEE PACT 2004: 267-277 |
62 | EE | Marc Levoy, Billy Chen, Vaibhav Vaish, Mark Horowitz, Ian McDowall, Mark T. Bolas: Synthetic aperture confocal imaging. ACM Trans. Graph. 23(3): 825-834 (2004) |
2003 | ||
61 | EE | Jan M. Rabaey, Dennis Sylvester, David Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang: Reshaping EDA for power. DAC 2003: 15 |
60 | EE | Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong: Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC 2003: 682-687 |
59 | EE | Dean Liu, Stefanos Sidiropoulos, Mark Horowitz: A Framework for Designing Reusable Analog Circuits. ICCAD 2003: 375-381 |
58 | EE | Mark Horowitz: High-Speed Link Design, Then and Now. ICCD 2003 |
57 | EE | David Lie, John C. Mitchell, Chandramohan A. Thekkath, Mark Horowitz: Specifying and Verifying Hardware for Tamper-Resistant Software. IEEE Symposium on Security and Privacy 2003: 166- |
56 | EE | Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, David Miller, Mark Horowitz, Olav Solgaard, Nick McKeown: Scaling internet routers using optics. SIGCOMM 2003: 189-200 |
55 | EE | David Lie, Chandramohan A. Thekkath, Mark Horowitz: Implementing an untrusted operating system on trusted hardware. SOSP 2003: 178-192 |
2002 | ||
54 | EE | Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic: Methods for true power minimization. ICCAD 2002: 35-42 |
2001 | ||
53 | EE | Jeff Solomon, Mark Horowitz: Using Texture Mapping with Mipmapping to Render a VLSI Layout. DAC 2001: 500-505 |
52 | EE | Ghazi Al-Rawi, John M. Cioffi, Mark Horowitz: Optimizing the Mapping of Low-Density Parity Check Codes on Parallel Decoding Architectures. ITCC 2001: 578- |
2000 | ||
51 | EE | David Lie, Chandramohan A. Thekkath, Mark Mitchell, Patrick Lincoln, Dan Boneh, John C. Mitchell, Mark Horowitz: Architectural Support for Copy and Tamper Resistant Software. ASPLOS 2000: 168-177 |
50 | EE | Rob A. Rutenbar, Cheming Hu, Mark Horowitz, Stephen Y. Chow: Life at the end of CMOS scaling (and beyond) (panel session) (abstract only). DAC 2000: 85 |
49 | EE | Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz: Smart Memories: a modular reconfigurable architecture. ISCA 2000: 161-171 |
48 | EE | Junji Ogawa, Mark Horowitz: A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro. Intelligent Memory Systems 2000: 1-14 |
1999 | ||
47 | EE | Jules P. Bergmann, Mark Horowitz: Vex - A CAD Toolbox. DAC 1999: 523-528 |
46 | EE | Hema Kapadia, Mark Horowitz: Using Partitioning to Help Convergence in the Standard-Cell Design Automation Methodology. DAC 1999: 592-597 |
45 | EE | Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz: Interconnect scaling implications for CAD. ICCAD 1999: 425-429 |
44 | EE | Jules P. Bergmann, Mark Horowitz: Improving coverage analysis and test generation for large designs. ICCAD 1999: 580-583 |
43 | EE | David L. Harris, Mark Horowitz, Dean Liu: Timing analysis including clock skew. IEEE Trans. on CAD of Integrated Circuits and Systems 18(11): 1608-1618 (1999) |
1998 | ||
42 | EE | Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz: An Evaluation of Directory Schemes for Cache Coherence. 25 Years ISCA: Retrospectives and Reprints 1998: 353-362 |
41 | EE | Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Stanford FLASH Multiprocessor. 25 Years ISCA: Retrospectives and Reprints 1998: 485-496 |
40 | EE | Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz: Approximate Reachability with BDDs Using Overlapping Projections. DAC 1998: 451-456 |
39 | EE | Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications. ACM Trans. Comput. Syst. 16(2): 170-205 (1998) |
38 | EE | Nick McKeown, Martin Izzard, Adisak Mekkittikul, Bill Ellersick, Mark Horowitz: The Tiny Tera: A Packet Switch Core CoRR cs.NI/9810006: (1998) |
1997 | ||
37 | EE | David L. Harris, Stuart F. Oberman, Mark Horowitz: SRT Division Architectures and Implementations. IEEE Symposium on Computer Arithmetic 1997: 18-25 |
36 | EE | Dan Teodosiu, Joel Baxter, Kinshuk Govil, John Chapin, Mendel Rosenblum, Mark Horowitz: Hardware Fault Containment in Scalable Shared-Memory Multiprocessors. ISCA 1997: 73-84 |
1996 | ||
35 | Mark Horowitz, Jan M. Rabaey, Brock Barton, Massoud Pedram: Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996, Monterey, California, USA, August 12-14, 1996 IEEE 1996 | |
34 | EE | Richard C. Ho, Mark Horowitz: Validation coverage analysis for complex digital designs. ICCAD 1996: 146-151 |
33 | EE | Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. ISCA 1996: 260-270 |
32 | EE | Gu-Yeon Wei, Mark Horowitz: A low power switching power supply for self-clocked systems. ISLPED 1996: 313-317 |
1995 | ||
31 | EE | H. Dhanesha, K. Falakshahi, Mark Horowitz: Array-of-arrays architecture for parallel floating point multiplication. ARVLSI 1995: 150-157 |
30 | EE | Richard C. Ho, C. Han Yang, Mark Horowitz, David L. Dill: Architecture Validation for Processors. ISCA 1995: 404-413 |
29 | EE | Kimiyoshi Usami, Mark Horowitz: Clustered voltage scaling technique for low-power design. ISLPD 1995: 3-8 |
1994 | ||
28 | Mark Heinrich, Jeffrey Kuskin, David Ofelt, John Heinlein, Joel Baxter, Jaswinder Pal Singh, Richard Simoni, Kourosh Gharachorloo, David Nakahira, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor. ASPLOS 1994: 274-285 | |
27 | James Laudon, Anoop Gupta, Mark Horowitz: Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. ASPLOS 1994: 308-318 | |
26 | Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy: The Stanford FLASH Multiprocessor. ISCA 1994: 302-313 | |
25 | James A. Gasbarro, Mark Horowitz: Techniques for Characterizing DRAMs With a 500-MHz Interface. ITC 1994: 516-525 | |
24 | EE | Russell Kao, Mark Horowitz: Timing analysis for piecewise linear Rsim. IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1498-1512 (1994) |
23 | EE | Russell Kao, Mark Horowitz: Eliminating redundant DC equations for asymptotic waveform evaluation. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 396-397 (1994) |
22 | EE | Mark E. Dean, David L. Dill, Mark Horowitz: Self-timed logic using Current-Sensing Completion Detection (CSCD). VLSI Signal Processing 7(1-2): 7-16 (1994) |
1993 | ||
21 | EE | Russell Kao, Mark Horowitz: Piecewise linear models for Rsim. ICCAD 1993: 753-758 |
1992 | ||
20 | Michael D. Smith, Mark Horowitz, Monica S. Lam: Efficient Superscalar Performance Through Boosting. ASPLOS 1992: 248-259 | |
19 | Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica S. Lam: The Stanford Dash Multiprocessor. IEEE Computer 25(3): 63-79 (1992) | |
1991 | ||
18 | Mark E. Dean, David L. Dill, Mark Horowitz: Self-Timed Logic Using Current-Sensing Completion Detection (CSCD). ICCD 1991: 187-191 | |
17 | EE | Richard Simoni, Mark Horowitz: Modeling the Performance of Limited Pointers Directories for Cache Coherence. ISCA 1991: 309-319 |
1990 | ||
16 | Michael D. Smith, Monica S. Lam, Mark Horowitz: Boosting Beyond Static Scheduling in a Superscalar Processor. ISCA 1990: 344-354 | |
15 | EE | Don Stark, Mark Horowitz: Techniques for calculating currents and voltages in VLSI power supply networks. IEEE Trans. on CAD of Integrated Circuits and Systems 9(2): 126-132 (1990) |
1989 | ||
14 | Michael D. Smith, Mike Johnson, Mark Horowitz: Limits on Multiple Instruction Issue. ASPLOS 1989: 290-302 | |
13 | EE | A. Salz, Mark Horowitz: IRSIM: An Incremental MOS Switch-Level Simulator. DAC 1989: 173-178 |
12 | EE | Steven A. Przybylski, Mark Horowitz, John L. Hennessy: Characteristics of Performance-Optimal Multi-Level Cache Hierarchies. ISCA 1989: 114-121 |
11 | EE | Anant Agarwal, Mark Horowitz, John L. Hennessy: An Analytical Cache Model. ACM Trans. Comput. Syst. 7(2): 184-215 (1989) |
1988 | ||
10 | EE | Don Stark, Mark Horowitz: Analyzing CMOS Power Supply Networks Using Ariel. DAC 1988: 460-464 |
9 | Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz: An Evaluation of Directory Schemes for Cache Coherence. ISCA 1988: 280-289 | |
8 | Steven A. Przybylski, Mark Horowitz, John L. Hennessy: Performance Tradeoffs in Cache Design. ISCA 1988: 290-298 | |
7 | EE | Anant Agarwal, John L. Hennessy, Mark Horowitz: Cache Performance of Operating System and Multiprogramming Workloads. ACM Trans. Comput. Syst. 6(4): 393-431 (1988) |
1987 | ||
6 | EE | C. W. Carpenter, Mark Horowitz: Generating Incremental VLSI Compaction Spacing Constraints. DAC 1987: 291-297 |
5 | EE | Don Stark, Mark Horowitz: RED: Resistance Extraction for Digital Simulation. DAC 1987: 570-573 |
4 | Paul Chow, Mark Horowitz: Architectural Tradeoffs in the Design of MIPS-X. ISCA 1987: 300-308 | |
3 | EE | Chorng-Yeong Chu, Mark Horowitz: Charge-Sharing Models for Switch-Level Simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1053-1061 (1987) |
1986 | ||
2 | Anant Agarwal, Richard L. Sites, Mark Horowitz: ATUM: A New Technique for Capturing Address Traces Using Microcode. ISCA 1986: 119-127 | |
1983 | ||
1 | EE | Mark Horowitz, Robert W. Dutton: Resistance Extraction from Mask Layout Data. IEEE Trans. on CAD of Integrated Circuits and Systems 2(3): 145-150 (1983) |