2008 |
31 | EE | Manish Amde,
Jaewook Shim,
Joel Marciano,
Kenneth Y. Yun,
Rene L. Cruz:
A low SINR synchronization system for direct-sequence spread-spectrum communications: radio prototype, verification testbed and experimental results.
TRIDENTCOM 2008: 25 |
2007 |
30 | EE | Jaewook Shim,
Manish Amde,
Kenneth Y. Yun,
Rene L. Cruz:
Synchronization at Low SINR in Asynchronous Direct-Sequence Spread-Spectrum Communications.
ICSNC 2007: 26 |
2004 |
29 | EE | Sushil K. Singh,
Viet L. Do,
Kevin W. James,
Kenneth Y. Yun,
Rene L. Cruz,
Manish Amde:
QoS Enabled Broadband Access Through Optical Rings.
LCN 2004: 421-422 |
2001 |
28 | EE | Kenneth Y. Yun:
A Terabit Multiservice Switch.
IEEE Micro 21(1): 58-70 (2001) |
2000 |
27 | EE | Kenneth Y. Yun,
Kevin W. James,
R. H. Fairlie-Cuninghame,
Supratik Chakraborty,
Rene L. Cruz:
A self-timed real-time sorting network.
IEEE Trans. VLSI Syst. 8(3): 356-363 (2000) |
1999 |
26 | EE | Ayoob E. Dooply,
Kenneth Y. Yun:
Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines.
ARVLSI 1999: 200-214 |
25 | EE | Kenneth Y. Yun,
Ayoob E. Dooply:
Optimal Evaluation Clocking of Self-Resetting Domino Pipelines.
ASP-DAC 1999: 121-124 |
24 | EE | Kenneth Y. Yun:
Recent Advances in Asynchronous Design Methodologies.
ASP-DAC 1999: 253- |
23 | EE | Shai Rotem,
Ken S. Stevens,
Charles Dike,
Marly Roncken,
Boris Agapiev,
Ran Ginosar,
Rakefet Kol,
Peter A. Beerel,
Chris J. Myers,
Kenneth Y. Yun:
RAPPID: An Asynchronous Instruction Length Decoder.
ASYNC 1999: 60-70 |
22 | EE | Erik Brunvand,
Steven M. Nowick,
Kenneth Y. Yun:
Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces.
DAC 1999: 104-109 |
21 | EE | Kenneth Y. Yun,
Ayoob E. Dooply:
Pausible clocking-based heterogeneous systems.
IEEE Trans. VLSI Syst. 7(4): 482-488 (1999) |
20 | EE | Wei-Chun Chou,
Peter A. Beerel,
Kenneth Y. Yun:
Average-case technology mapping of asynchronous burst-mode circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(10): 1418-1434 (1999) |
19 | EE | Kenneth Y. Yun,
David L. Dill:
Automatic synthesis of extended burst-mode circuits. I.(Specification and hazard-free implementations).
IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 101-117 (1999) |
18 | EE | Kenneth Y. Yun,
David L. Dill:
Automatic synthesis of extended burst-mode circuits. II. (Automaticsynthesis).
IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 118-132 (1999) |
17 | EE | Supratik Chakraborty,
Kenneth Y. Yun,
David L. Dill:
Timing analysis of asynchronous systems using time separation of events.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1061-1076 (1999) |
1998 |
16 | EE | Kevin W. James,
Kenneth Y. Yun:
Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
ASYNC 1998: 70-79 |
15 | EE | Wei-Chun Chou,
Peter A. Beerel,
Ran Ginosar,
Rakefet Kol,
Chris J. Myers,
Shai Rotem,
Ken S. Stevens,
Kenneth Y. Yun:
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
ASYNC 1998: 80- |
14 | EE | Kenneth Y. Yun,
Peter A. Beerel,
Vida Vakilotojar,
Ayoob E. Dooply,
Julio Arceo:
The design and verification of a high-performance low-control-overhead asynchronous differential equation solver.
IEEE Trans. VLSI Syst. 6(4): 643-655 (1998) |
13 | EE | Kenneth Y. Yun,
Bill Lin,
David L. Dill,
Srinivas Devadas:
BDD-based synthesis of extended burst-mode controllers.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 782-792 (1998) |
1997 |
12 | EE | Supratik Chakraborty,
David L. Dill,
Kun-Yung Chang,
Kenneth Y. Yun:
Timing Analysis of Extended Burst-Mode Circuits.
ASYNC 1997: 101-111 |
11 | EE | Kenneth Y. Yun,
Ayoob E. Dooply,
Julio Arceo,
Peter A. Beerel,
Vida Vakilotojar:
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver.
ASYNC 1997: 140- |
10 | EE | Steven M. Nowick,
Kenneth Y. Yun,
Ayoob E. Dooply,
Peter A. Beerel:
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders.
ASYNC 1997: 210- |
9 | | Erik Brunvand,
Steven M. Nowick,
Kenneth Y. Yun:
Practical Advances in Asynchronous Design.
ICCD 1997: 662-668 |
1996 |
8 | EE | Kenneth Y. Yun,
Ryan P. Donohue:
Pausible Clocking: A First Step Toward Heterogeneous Systems.
ICCD 1996: 118- |
1995 |
7 | EE | Peter A. Beerel,
Kenneth Y. Yun,
Steven M. Nowick,
Pei-Chuan Yeh:
Estimation and bounding of energy consumption in burst-mode control circuits.
ICCAD 1995: 26-33 |
6 | EE | Kenneth Y. Yun,
David L. Dill:
A high-performance asynchronous SCSI controller.
ICCD 1995: 44- |
1994 |
5 | EE | Kenneth Y. Yun,
Bill Lin,
David L. Dill,
Srinivas Devadas:
Performance-driven synthesis of asynchronous controllers.
ICCAD 1994: 550-557 |
1993 |
4 | EE | Kenneth Y. Yun,
David L. Dill:
Unifying synchronous/asynchronous state machine synthesis.
ICCAD 1993: 255-260 |
1992 |
3 | EE | Kenneth Y. Yun,
David L. Dill:
Automatic synthesis of 3D asynchronous state machines.
ICCAD 1992: 576-580 |
2 | | Steven M. Nowick,
Kenneth Y. Yun,
David L. Dill:
Practical Asynchronous Controller Design.
ICCD 1992: 341-345 |
1 | | Kenneth Y. Yun,
David L. Dill,
Steven M. Nowick:
Synthesis of 3D Asynchronous State Machines.
ICCD 1992: 346-350 |