2007 |
7 | | Koen Bertels,
Walid A. Najjar,
Arjan J. van Genderen,
Stamatis Vassiliadis:
FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007
IEEE 2007 |
1996 |
6 | EE | Arjan J. van Genderen,
N. P. van der Meijs:
Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction.
DAC 1996: 758-763 |
1995 |
5 | EE | N. P. van der Meijs,
Arjan J. van Genderen:
Delayed Frontal Solution for Finite-Element Based Resistance Extraction.
DAC 1995: 273-278 |
4 | EE | T. Smedes,
N. P. van der Meijs,
Arjan J. van Genderen:
Extraction of circuit models for substrate cross-talk.
ICCAD 1995: 199-206 |
3 | EE | Frederik Beeftink,
Arjan J. van Genderen,
N. P. van der Meijs:
Accurate and efficient layout-to-circuit extraction for high-speed MOS and bipolar/BiCMOS integrated circuits.
ICCD 1995: 360-365 |
1993 |
2 | EE | Arjan J. van Genderen,
N. P. van der Meijs:
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures.
ICCAD 1993: 764-769 |
1989 |
1 | EE | N. P. van der Meijs,
Arjan J. van Genderen:
An Efficient Finite Element Method for Submicron IC Capacitance Extraction.
DAC 1989: 678-681 |