![]() |
| 2001 | ||
|---|---|---|
| 2 | EE | Josef Schmid, Timo Schüring, Christoph Smalla: Using the Boundary Scan Delay Chain for Cross-Chip Delay Measurement and Characterization of Delay Modeling Flow. ISQED 2001: 337-342 |
| 1999 | ||
| 1 | EE | Josef Schmid, Joachim Knäblein: Advanced Synchronous Scan Test Methodology for Multi Clock Domain ASICs. VTS 1999: 106-113 |
| 1 | Joachim Knäblein | [1] |
| 2 | Timo Schüring | [2] |
| 3 | Christoph Smalla | [2] |