| 2003 |
|---|
| 7 | EE | Rahul Kundu,
R. D. (Shawn) Blanton:
ATPG for Noise-Induced Switch Failures in Domino Logic.
ICCAD 2003: 765-769 |
| 6 | EE | Rahul Kundu,
R. D. (Shawn) Blanton:
Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk.
ITC 2003: 122-130 |
| 2002 |
|---|
| 5 | EE | Rahul Kundu,
R. D. (Shawn) Blanton:
Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits.
VTS 2002: 379-388 |
| 4 | EE | Keerthi Heragu,
Manish Sharma,
Rahul Kundu,
Ronald D. Blanton:
Test vector generation for charge sharing failures in dynamic logic.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1502-1508 (2002) |
| 2001 |
|---|
| 3 | EE | Keerthi Heragu,
Manish Sharma,
Rahul Kundu,
R. D. (Shawn) Blanton:
Testing of Dynamic Logic Circuits Based on Charge Sharing.
VTS 2001: 396-403 |
| 2000 |
|---|
| 2 | | Rahul Kundu,
Ronald D. Blanton:
Identification of crosstalk switch failures in domino CMOS circuits.
ITC 2000: 502-509 |
| 1999 |
|---|
| 1 | EE | Jingjing Xu,
Rahul Kundu,
F. Joel Ferguson:
A Systematic DFT Procedure for Library Cells.
VTS 1999: 460-466 |
