Rahul Kundu

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7EERahul Kundu, R. D. (Shawn) Blanton: ATPG for Noise-Induced Switch Failures in Domino Logic. ICCAD 2003: 765-769
6EERahul Kundu, R. D. (Shawn) Blanton: Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk. ITC 2003: 122-130
5EERahul Kundu, R. D. (Shawn) Blanton: Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits. VTS 2002: 379-388
4EEKeerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton: Test vector generation for charge sharing failures in dynamic logic. IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1502-1508 (2002)
3EEKeerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton: Testing of Dynamic Logic Circuits Based on Charge Sharing. VTS 2001: 396-403
2 Rahul Kundu, Ronald D. Blanton: Identification of crosstalk switch failures in domino CMOS circuits. ITC 2000: 502-509
1EEJingjing Xu, Rahul Kundu, F. Joel Ferguson: A Systematic DFT Procedure for Library Cells. VTS 1999: 460-466

Coauthor Index

1R. D. (Shawn) Blanton (Ronald D. Blanton) [2] [3] [4] [5] [6] [7]
2F. Joel Ferguson [1]
3Keerthi Heragu [3] [4]
4Manish Sharma [3] [4]
5Jingjing Xu [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)