| 2008 |
|---|
| 16 | EE | Steffen Tarnick:
Self-Testing Embedded Borden t -UED Code Checkers for t = 2 k q - 1 with q = 2 m - 1.
J. Electronic Testing 24(6): 509-527 (2008) |
| 2007 |
|---|
| 15 | EE | Steffen Tarnick:
Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters.
IOLTS 2007: 285-292 |
| 2006 |
|---|
| 14 | EE | Steffen Tarnick:
Embedded Borden 2-UED Code Checkers.
IOLTS 2006: 173-175 |
| 2005 |
|---|
| 13 | EE | Steffen Tarnick:
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes.
J. Electronic Testing 21(4): 391-404 (2005) |
| 2004 |
|---|
| 12 | EE | Steffen Tarnick:
Single-Output Embedded Checkers for Systematic Unordered Codes.
IOLTS 2004: 45-51 |
| 11 | EE | Steffen Tarnick:
Design of Embedded Self-Testing Checkers for t-UED and BUED Codes.
J. Electronic Testing 20(5): 465-477 (2004) |
| 2003 |
|---|
| 10 | EE | Steffen Tarnick:
Self-Testing Embedded Checkers for Bose-Lin, Bose, and a Class of Borden Codes.
DATE 2003: 11162-11163 |
| 9 | EE | Steffen Tarnick:
A Design Method for Embedded Self-Testing t-UED and BUED Code Checkers.
IOLTS 2003: 43-48 |
| 2000 |
|---|
| 8 | EE | Albrecht P. Stroele,
Steffen Tarnick:
Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes.
J. Electronic Testing 16(4): 355-367 (2000) |
| 1999 |
|---|
| 7 | EE | Albrecht P. Stroele,
Steffen Tarnick:
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Code.
VTS 1999: 361-369 |
| 1998 |
|---|
| 6 | EE | Steffen Tarnick,
Albrecht P. Stroele:
Embedded self-testing checkers for low-cost arithmetic codes.
ITC 1998: 514-523 |
| 1996 |
|---|
| 5 | | S. Kundu,
Egor S. Sogomonyan,
Michael Gössel,
Steffen Tarnick:
Self-Checking Comparator with One Periodic Output.
IEEE Trans. Computers 45(3): 379-380 (1996) |
| 1995 |
|---|
| 4 | EE | Sybille Hellebrand,
Birgit Reeb,
Steffen Tarnick,
Hans-Joachim Wunderlich:
Pattern generation for a deterministic BIST scheme.
ICCAD 1995: 88-94 |
| 3 | | Sybille Hellebrand,
Janusz Rajski,
Steffen Tarnick,
Srikanth Venkataraman,
Bernard Courtois:
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.
IEEE Trans. Computers 44(2): 223-233 (1995) |
| 2 | EE | Steffen Tarnick:
Controllable self-checking checkers for conditional concurrent checking.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 547-553 (1995) |
| 1992 |
|---|
| 1 | | Sybille Hellebrand,
Steffen Tarnick,
Bernard Courtois,
Janusz Rajski:
Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers.
ITC 1992: 120-129 |
