| 1999 |
|---|
| 61 | EE | Krishnaiyan Thulasiraman,
Anindya Das,
Kaiyuan Huang,
Vinod K. Agarwal:
Correct diagnosis of almost all faulty units in a multiprocessor system.
ISCAS (6) 1999: 161-164 |
| 60 | | Vinod K. Agarwal:
Invited Talk: Embedded Test for Systems-on-a-Chip.
VLSI Design 1999 |
| 59 | EE | Vinod K. Agarwal:
VTS 1999 Keynote Address Embedded Test OR External Test.
VTS 1999: 2-7 |
| 1998 |
|---|
| 58 | EE | Kaiyuan Huang,
Vinod K. Agarwal,
Krishnaiyan Thulasiraman:
Diagnosis of clustered faults and wafer testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(2): 136-148 (1998) |
| 57 | EE | Krishnaiyan Thulasiraman,
Anindya Das,
Kaiyuan Huang,
Vinod K. Agarwal:
Correct Diagnosis of Almost All Faulty Units in a Multiprocessor System.
Journal of Circuits, Systems, and Computers 8(4): 473-481 (1998) |
| 1997 |
|---|
| 56 | EE | Vinod K. Agarwal:
Embedded Test and Measurement Critical for Deep Submicron Technology.
Asian Test Symposium 1997: 2- |
| 1995 |
|---|
| 55 | | Koppolu Sasidhar,
Abhijit Chatterjee,
Vinod K. Agarwal,
Joseph L. A. Hughes:
Distributed Probabilistic Diagnosis of MCMs on Large Area.
ITC 1995: 208-216 |
| 54 | | Oryal Tanir,
Vinod K. Agarwal,
P. C. P. Bhatt:
A Specification-Driven Architectural Design Environment.
IEEE Computer 28(6): 26-35 (1995) |
| 53 | | Vinod K. Agarwal:
VTS 1994 Panel Report on BIST for Consumer Products.
IEEE Design & Test of Computers 12(1): 12- (1995) |
| 52 | EE | Kaiyuan Huang,
Vinod K. Agarwal,
Laurence E. LaForge,
Krishnaiyan Thulasiraman:
A Diagnosis Algorithm for Constant Degree Structures and Its Application to VLSI Circuit Testing.
IEEE Trans. Parallel Distrib. Syst. 6(4): 363-372 (1995) |
| 51 | EE | D. Lambidonis,
André Ivanov,
Vinod K. Agarwal:
Fast signature computation for BIST linear compactors.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(8): 1037-1044 (1995) |
| 50 | EE | D. Lambidonis,
Vinod K. Agarwal,
André Ivanov,
Dhiren Xavier:
A quasi-optimal scheduling of intermediate signatures for multiple signature analysis compaction testing schemes.
J. Electronic Testing 6(1): 75-84 (1995) |
| 1994 |
|---|
| 49 | | Oryal Tanir,
Vinod K. Agarwal,
P. C. P. Bhatt:
DASE: An Environment for System Level Telecommunication Design Exploration and Modelling.
CAST 1994: 302-318 |
| 48 | | Guoning Liao,
Erik R. Altman,
Vinod K. Agarwal,
Guang R. Gao:
A Comparative Study of Multiprocessor List Scheduling Heuristics.
HICSS (1) 1994: 68-77 |
| 47 | | Morie E. Malowany,
Gordon W. Roberts,
Vinod K. Agarwal:
VAMP: A Hierarchical Framework for Design for Manufacturability.
ISCAS 1994: 141-144 |
| 46 | | Shashank S. Nemawarkar,
Ramaswamy Govindarajan,
Guang R. Gao,
Vinod K. Agarwal:
Performance of Interconnection Network in Multithreaded Architectures.
PARLE 1994: 823-826 |
| 45 | | Laurence E. LaForge,
Kaiyuan Huang,
Vinod K. Agarwal:
Almost Sure Diagnosis of Almost Every Good Element.
IEEE Trans. Computers 43(3): 295-305 (1994) |
| 44 | | Anindya Das,
Krishnaiyan Thulasiraman,
Vinod K. Agarwal:
Diagnosis of t/(t+1)-Diagnosable Systems.
SIAM J. Comput. 23(5): 895-905 (1994) |
| 1993 |
|---|
| 43 | | Erik R. Altman,
Vinod K. Agarwal,
Guang R. Gao:
A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy.
ICGA 1993: 392-399 |
| 42 | | Robert P. Treuer,
Vinod K. Agarwal:
Fault Location Algorithms for Repairable Embedded.
ITC 1993: 825-834 |
| 41 | | Shashank S. Nemawarkar,
Ramaswamy Govindarajan,
Guang R. Gao,
Vinod K. Agarwal:
Analysis of Multithreaded Multiprocessors with Distributed Shared Memory.
SPDP 1993: 114-121 |
| 40 | EE | Robert P. Treuer,
Vinod K. Agarwal:
Built-In Self-Diagnosis for Repairable Embedded RAMs.
IEEE Design & Test of Computers 10(2): 24-33 (1993) |
| 39 | | Anindya Das,
Krishnaiyan Thulasiraman,
Vinod K. Agarwal,
K. B. Lakshmanan:
Multiprocessor Fault Diagnosis Under Local Constraints.
IEEE Trans. Computers 42(8): 984-988 (1993) |
| 38 | | Anindya Das,
Krishnaiyan Thulasiraman,
K. B. Lakshmanan,
Vinod K. Agarwal:
Distributed Fault diagnosis of a Ring of Processors.
Parallel Processing Letters 3: 195-204 (1993) |
| 1992 |
|---|
| 37 | | Kaiyuan Huang,
Vinod K. Agarwal,
Laurence E. LaForge:
Wafer Testing with Pairwise Comparisons.
FTCS 1992: 374-383 |
| 36 | | Shashank S. Nemawarkar,
Ramaswamy Govindarajan,
Guang R. Gao,
Vinod K. Agarwal:
Performance Evaluation of Latency Tolerant Architectures.
ICCI 1992: 183-186 |
| 35 | | Arun K. Somani,
Vinod K. Agarwal:
Distributed Diagnosis Algorithms for Regular Interconnected Structures.
IEEE Trans. Computers 41(7): 899-906 (1992) |
| 34 | EE | Dhiren Xavier,
Robert C. Aitken,
André Ivanov,
Vinod K. Agarwal:
Using an asymmetric error model to study aliasing in signature analysis registers.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(1): 16-25 (1992) |
| 33 | EE | Abu S. M. Hassan,
Vinod K. Agarwal,
Benoit Nadeau-Dostie,
Janusz Rajski:
BIST of PCB interconnects using boundary-scan architecture.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(10): 1278-1288 (1992) |
| 1991 |
|---|
| 32 | | D. Lambidonis,
André Ivanov,
Vinod K. Agarwal:
Fast Signature Computation for Linear Compactors.
ITC 1991: 808-817 |
| 31 | EE | André Ivanov,
Corot W. Starke,
Vinod K. Agarwal,
Wilfried Daehn,
Matthias Gruetzner,
Tom W. Williams:
Iterative algorithms for computing aliasing probabilities.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(2): 260-265 (1991) |
| 1990 |
|---|
| 30 | EE | Benoit Nadeau-Dostie,
Allan Silburt,
Vinod K. Agarwal:
Serial Interfacing for Embedded-Memory Testing.
IEEE Design & Test of Computers 7(2): 52-63 (1990) |
| 29 | EE | Yervant Zorian,
Vinod K. Agarwal:
Optimizing error masking in BIST by output data modification.
J. Electronic Testing 1(1): 59-71 (1990) |
| 1989 |
|---|
| 28 | | Dhiren Xavier,
Robert C. Aitken,
André Ivanov,
Vinod K. Agarwal:
: Experiments on Aliasing in Signature Analysis Registers.
ITC 1989: 344-354 |
| 27 | | Abu S. M. Hassan,
Vinod K. Agarwal,
Janusz Rajski,
Benoit Nadeau-Dostie:
Testing of Glue Logic Interconnects Using Boundary Scan Architecture.
ITC 1989: 700-711 |
| 26 | | Anindya Das,
Krishnaiyan Thulasiraman,
Vinod K. Agarwal,
K. B. Lakshmanan:
t/s-Diagnosable Systems: A Characterization and Diagnosis Algorithm.
WG 1989: 34-45 |
| 25 | | Arun K. Somani,
Vinod K. Agarwal,
David Avis:
On the Complexity of Single Fault Set Diagnosability and Diagnosis Problems.
IEEE Trans. Computers 38(2): 195-201 (1989) |
| 24 | EE | André Ivanov,
Vinod K. Agarwal:
An analysis of the probabilistic behavior of linear feedback signature registers.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(10): 1074-1088 (1989) |
| 1988 |
|---|
| 23 | | Abu S. M. Hassan,
Vinod K. Agarwal,
Janusz Rajski:
Testing and Diagnosis of Interconnects Using Boundary Scan Architecture.
ITC 1988: 126-137 |
| 22 | | Henry Cox,
André Ivanov,
Vinod K. Agarwal,
Janusz Rajski:
On Multiple Fault Coverage and Aliasing Probability Measures.
ITC 1988: 314-321 |
| 21 | | Michael C. Howells,
Vinod K. Agarwal:
A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures.
IEEE Trans. Computers 37(4): 463-468 (1988) |
| 20 | EE | André Ivanov,
Vinod K. Agarwal:
Dynamic testability measures for ATPG.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 598-608 (1988) |
| 1987 |
|---|
| 19 | | Robert P. Treuer,
Vinod K. Agarwal,
Hideo Fujiwara:
A New Built-In Self-Test Design for PLA's with High Fault Coverage and Low Overhead.
IEEE Trans. Computers 36(3): 369-373 (1987) |
| 18 | | Arun K. Somani,
Vinod K. Agarwal,
David Avis:
A Generalized Theory for System Level Diagnosis.
IEEE Trans. Computers 36(5): 538-546 (1987) |
| 1986 |
|---|
| 17 | | André Ivanov,
Vinod K. Agarwal:
Testability Measures : What Do They Do for ATPG ?
ITC 1986: 129-139 |
| 16 | | A. S. Mahmudul Hassan,
Vinod K. Agarwal:
A Fault-Tolerant Modular Architecture for Binary Trees.
IEEE Trans. Computers 35(4): 356-361 (1986) |
| 15 | EE | Michel Dagenais,
Vinod K. Agarwal,
Nicholas C. Rumin:
McBOOLE: A New Procedure for Exact Logic Minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 5(1): 229-238 (1986) |
| 1985 |
|---|
| 14 | EE | Michel Dagenais,
Vinod K. Agarwal,
Nicholas C. Rumin:
The McBOOLE logic minimizer.
DAC 1985: 667-673 |
| 13 | | Vinod K. Agarwal,
Janusz Rajski:
Testing Properties and Applications of Inverter-Free PLA's.
ITC 1985: 500-507 |
| 12 | | Arun K. Somani,
Vinod K. Agarwal:
An Efficient Unsorted VLSI Dictionary Machine.
IEEE Trans. Computers 34(9): 841-852 (1985) |
| 1984 |
|---|
| 11 | | Arun K. Somani,
Vinod K. Agarwal:
An Efficient VLSI Dictionary Machine.
ISCA 1984: 142-150 |
| 10 | | Yervant Zorian,
Vinod K. Agarwal:
Higher Certainty of Error Coverage by Output Data Modification.
ITC 1984: 140-147 |
| 9 | | Yvon Savaria,
Vinod K. Agarwal,
Nicholas C. Rumin,
Jeremiah F. Hayes:
A Design for Machines with Built-In Tolerance to Soft Errors.
ITC 1984: 649-659 |
| 8 | | Jacek Jachner,
Vinod K. Agarwal:
Data Flow Anomaly Detection.
IEEE Trans. Software Eng. 10(4): 432-437 (1984) |
| 1983 |
|---|
| 7 | | Michael G. Lamoureux,
Vinod K. Agarwal:
Non-Stuck-At Fault Detection in nMOS Circuits by Region Analysis.
ITC 1983: 129-137 |
| 1981 |
|---|
| 6 | | Vinod K. Agarwal,
Andy S. F. Fung:
Multiple Fault Testing of Large Circuits by Single Fault Test Sets.
IEEE Trans. Computers 30(11): 855-865 (1981) |
| 1980 |
|---|
| 5 | | Vinod K. Agarwal,
Gerald M. Masson:
Generic Fault Characterizations for Table Look-Up Coverage Bounding.
IEEE Trans. Computers 29(4): 288-299 (1980) |
| 4 | | Vinod K. Agarwal:
Multiple Fault Detection in Programmable Logic Arrays.
IEEE Trans. Computers 29(6): 518-522 (1980) |
| 1979 |
|---|
| 3 | | Vinod K. Agarwal,
Gerald M. Masson:
A Functional Form Approach to Test Set Coverage in Tree Networks.
IEEE Trans. Computers 28(1): 50-52 (1979) |
| 2 | | Vinod K. Agarwal,
Gerald M. Masson:
Recursive Coverage Projection of Test Sets.
IEEE Trans. Computers 28(11): 865-870 (1979) |
| 1977 |
|---|
| 1 | | Vinod K. Agarwal,
Gerald M. Masson:
Resolution-Oriented Fault Interrelationships in Combinational Logic Networks.
IEEE Trans. Computers 26(11): 1170-1175 (1977) |
