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Jayabrata Ghosh-Dastidar

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2003
8EEAbhijit Jas, Jayabrata Ghosh-Dastidar, Mom-Eng Ng, Nur A. Touba: An efficient test vector compression scheme using selective Huffman coding. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 797-806 (2003)
2001
7EEJayabrata Ghosh-Dastidar, Nur A. Touba: Improving Diagnostic Resolution of Delay Faults in FPGAs by Exploiting Reconfigurability. DFT 2001: 215-220
6EERamesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar: On Diagnosing Path Delay Faults in an At-Speed Environment. VTS 2001: 28-33
2000
5EEJayabrata Ghosh-Dastidar, Nur A. Touba: A Rapid and Scalable Diagnosis Scheme for BIST Environments with a Large Number of Scan Chains. VTS 2000: 79-88
1999
4 Jayabrata Ghosh-Dastidar, Debaleena Das, Nur A. Touba: Fault diagnosis in scan-based BIST using both time and space information. ITC 1999: 95-102
3EEAbhijit Jas, Jayabrata Ghosh-Dastidar, Nur A. Touba: Scan Vector Compression/Decompression Using Statistical Coding. VTS 1999: 114-120
2EEJayabrata Ghosh-Dastidar, Nur A. Touba: Adaptive Techniques for Improving Delay Fault Diagnosis. VTS 1999: 168-172
1998
1EEJayabrata Ghosh-Dastidar, Nur A. Touba: A Systematic Approach for Diagnosing Multiple Delay Faults. DFT 1998: 211-216

Coauthor Index

1Debaleena Das [4]
2Abhijit Jas [3] [8]
3Mom-Eng Ng [8]
4Ramesh C. Tekumalla [6]
5Nur A. Touba [1] [2] [3] [4] [5] [7] [8]
6Srikanth Venkataraman [6]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)