| |
| 2004 | ||
|---|---|---|
| 2 | EE | Stuart McCracken, Zeljko Zilic: Design for Testability of FPGA Blocks. ISQED 2004: 86-91 |
| 2002 | ||
| 1 | EE | Stuart McCracken, Zeljko Zilic: FPGA test time reduction through a novel interconnect testing scheme. FPGA 2002: 136-144 |
| 1 | Zeljko Zilic | [1] [2] |