| 2009 |
|---|
| 8 | EE | Syed M. Alam,
Robert E. Jones,
Scott Pozder,
Ankur Jain:
Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology.
ISQED 2009: 569-575 |
| 2008 |
|---|
| 7 | EE | Syed M. Alam,
Mike Ignatowski,
Yuan Xie:
Technology, CAD tools, and designs for emerging 3D integration technology.
ACM Great Lakes Symposium on VLSI 2008: 1-2 |
| 2007 |
|---|
| 6 | EE | Syed M. Alam,
Robert E. Jones,
Shahid Rauf,
Ritwik Chatterjee:
Inter-Strata Connection Characteristics and Signal Transmission in Three-Dimensional (3D) Integration Technology.
ISQED 2007: 580-585 |
| 5 | EE | Syed M. Alam,
Chee Lip Gan,
Carl V. Thompson,
Donald E. Troxel:
Reliability computer-aided design tool for full-chip electromigration analysis and comparison with different interconnect metallizations.
Microelectronics Journal 38(4-5): 463-473 (2007) |
| 2005 |
|---|
| 4 | EE | Syed M. Alam,
Donald E. Troxel,
Carl V. Thompson:
Thermal aware cell-based full-chip electromigration reliability analysis.
ACM Great Lakes Symposium on VLSI 2005: 26-31 |
| 3 | EE | Syed M. Alam,
Frank L. Wei,
Chee Lip Gan,
Carl V. Thompson,
Donald E. Troxel:
Electromigration Reliability Comparison of Cu and Al Interconnects.
ISQED 2005: 303-308 |
| 2004 |
|---|
| 2 | EE | Syed M. Alam,
Chee Lip Gan,
Carl V. Thompson,
Donald E. Troxel:
Circuit Level Reliability Analysis of Cu Interconnects.
ISQED 2004: 238-243 |
| 2002 |
|---|
| 1 | EE | Syed M. Alam,
Donald E. Troxel,
Carl V. Thompson:
A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits.
ISQED 2002: 246-251 |
