| |
| 2005 | ||
|---|---|---|
| 3 | EE | Rishi Chaturvedi, Jiang Hu: An efficient merging scheme for prescribed skew clock routing. IEEE Trans. VLSI Syst. 13(6): 750-754 (2005) |
| 2004 | ||
| 2 | EE | Rishi Chaturvedi, Jiang Hu: Buffered Clock Tree for High Quality IC Design. ISQED 2004: 381-386 |
| 2003 | ||
| 1 | EE | Rishi Chaturvedi, Jiang Hu: A Simple Yet Effective Merging Scheme for Prescribed-Skew Clock Routing. ICCD 2003: 282- |
| 1 | Jiang Hu | [1] [2] [3] |