| 2004 |
|---|
| 8 | EE | Sachio Hayashi,
Fumihiro Minami,
Masaaki Yamada:
Full-Chip Analysis Method of ESD Protection Network.
ISQED 2004: 439-444 |
| 2000 |
|---|
| 7 | EE | Norman Kojima,
Yukiko Parameswar,
Christian Klingner,
Yukio Ohtaguro,
Masataka Matsui,
Shigeaki Iwasa,
Tatsuo Teruyama,
Takayoshi Shimazawa,
Hideki Takeda,
Kouji Hashizume,
Haruyuki Tago,
Masaaki Yamada:
Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor.
ASP-DAC 2000: 641-646 |
| 6 | EE | Sachio Hayashi,
Masaaki Yamada:
EMI-noise analysis under ASIC design environment.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1337-1346 (2000) |
| 1999 |
|---|
| 5 | EE | Sachio Hayashi,
Masaaki Yamada:
EMI-noise analysis under ASIC design environment.
ISPD 1999: 16-21 |
| 1995 |
|---|
| 4 | EE | M. Tachibana,
S. Kurosawa,
R. Nojima,
Norman Kojima,
Masaaki Yamada,
Takashi Mitsuhashi,
Nobuyuki Goto:
Power and area optimization by reorganizing CMOS complex gate circuits.
ISLPD 1995: 155-160 |
| 1990 |
|---|
| 3 | | Masako Murofushi,
Masaaki Yamada,
Takashi Mitsuhashi:
FOLM-Planner: A New Floorplanner with a Frame Overlapping Floorplan Model Suitable for SOG (Sea-of-Gates) Type Gate Arrays.
ICCAD 1990: 140-143 |
| 1989 |
|---|
| 2 | EE | Xianjin Yao,
Masaaki Yamada,
C. L. Liu:
A new approach to the pin assignment problem.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(9): 999-1006 (1989) |
| 1988 |
|---|
| 1 | EE | Xianji Yao,
Masaaki Yamada,
C. L. Liu:
A New Approach to the Pin Assignment Problem.
DAC 1988: 566-572 |
