| 2007 |
|---|
| 8 | EE | Bastien Giraud,
Amara Amara,
Andrei Vladimirescu:
A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation.
ISCAS 2007: 3022-3025 |
| 2006 |
|---|
| 7 | EE | Andrei Vladimirescu,
Radu Zlatanovici,
Paul G. A. Jespers:
Analog circuit synthesis using standard EDA tools.
ISCAS 2006 |
| 2005 |
|---|
| 6 | EE | Huifang Qin,
Yu Cao,
Dejan Markovic,
Andrei Vladimirescu,
Jan M. Rabaey:
Standby supply voltage minimization for deep sub-micron SRAM.
Microelectronics Journal 36(9): 789-800 (2005) |
| 2004 |
|---|
| 5 | EE | Huifang Qin,
Yu Cao,
Dejan Markovic,
Andrei Vladimirescu,
Jan M. Rabaey:
SRAM Leakage Suppression by Minimizing Standby Supply Voltage.
ISQED 2004: 55-60 |
| 4 | EE | A. Valentian,
O. Thomas,
Andrei Vladimirescu,
Amara Amara:
Modeling subthreshold SOI logic for static timing analysis.
IEEE Trans. VLSI Syst. 12(6): 662-669 (2004) |
| 2002 |
|---|
| 3 | EE | Razvan Ionita,
Andrei Vladimirescu,
Paul G. A. Jespers:
Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems.
PATMOS 2002: 487-494 |
| 1991 |
|---|
| 2 | EE | John H. Chan,
Andrei Vladimirescu,
Xiao-Chun Gao,
Peter Liebmann,
John Valainis:
Nonlinear transformer model for circuit simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 476-482 (1991) |
| 1987 |
|---|
| 1 | EE | Andrei Vladimirescu,
David Weiss,
Manolis Katevenis,
Zvika Bronstein,
Alon Kifir,
Karja Danuwidjaja,
K. C. Ng,
Niraj Jain,
Steve Lass:
A Vector Hardware Accelerator with Circuit Simulation Emphasis.
DAC 1987: 89-94 |
