| 2004 |
|---|
| 7 | EE | Seongkyun Shin,
Yungseon Eo,
William R. Eisenstadt,
Jongin Shim:
Analytical Dynamic Time Delay Model of Strongly Coupled RLC Interconnect Lines Dependent on Switching.
ISQED 2004: 337-342 |
| 6 | | Seongkyun Shin,
Yungseon Eo,
William R. Eisenstadt,
Jongin Shim:
Analytical models and algorithms for the efficient signal integrity verification of inductance-effect-prominent multicoupled VLSI circuit interconnects.
IEEE Trans. VLSI Syst. 12(4): 395-407 (2004) |
| 5 | EE | Yungseon Eo,
Seongkyun Shin,
William R. Eisenstadt,
Jongin Shim:
A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1321-1337 (2004) |
| 2002 |
|---|
| 4 | EE | Seongkyun Shin,
Yungseon Eo,
William R. Eisenstadt,
Jongin Shim:
Analytical signal integrity verification models for inductance-dominant multi-coupled VLSI interconnects.
SLIP 2002: 61-68 |
| 3 | EE | Yungseon Eo,
Seongkyun Shin,
William R. Eisenstadt,
Jongin Shim:
Generalized traveling-wave-based waveform approximation technique for the efficient signal integrity verification of multicoupled transmission line system.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1489-1497 (2002) |
| 2 | EE | Yungseon Eo,
Jongin Shim,
William R. Eisenstadt:
A traveling-wave-based waveform approximation technique for thetiming verification of single transmission lines.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 723-730 (2002) |
| 2001 |
|---|
| 1 | EE | Woojin Jin,
Yungseon Eo,
William R. Eisenstadt,
Jongin Shim:
Fast and accurate quasi-three-dimensional capacitance determination of multilayer VLSI interconnects.
IEEE Trans. VLSI Syst. 9(3): 450-460 (2001) |
