12. FPL 2002:
Montpellier,
France
Manfred Glesner, Peter Zipf, Michel Renovell (Eds.):
Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings.
Lecture Notes in Computer Science 2438 Springer 2002, ISBN 3-540-44108-5 BibTeX
@proceedings{DBLP:conf/fpl/2002,
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, FPL 2002,
Montpellier, France, September 2-4, 2002, Proceedings},
booktitle = {FPL},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
volume = {2438},
year = {2002},
isbn = {3-540-44108-5},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Keynote Address
Trends
Rapid Prototyping
FPGA Synthesis
Custom Computing Engines
DSP Applications 1
Reconfigurable Fabrics
Dynamic Reconfiguration 1
- Ian Robertson, James Irvine, Patrick Lysaght, David Robinson:
Improved Functional Simulation of Dynamically Reconfigurable Logic.
152-161
Electronic Edition (link) BibTeX
- Sergio López-Buedo, Paula Riviere, Pablo Pernas, Eduardo I. Boemo:
Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology.
162-170
Electronic Edition (link) BibTeX
- Gerard J. M. Smit, Paul J. M. Havinga, Lodewijk T. Smit, Paul M. Heysters, Michèl A. J. Rosien:
Dynamic Reconfiguration in Mobile Systems.
171-181
Electronic Edition (link) BibTeX
- Edson L. Horta, John W. Lockwood, Sergio Takeo Kofuji:
Using PARBIT to Implement Partial Run-Time Reconfigurable Systems.
182-191
Electronic Edition (link) BibTeX
DSP Applications 2
Routing & Placement
Dynamic Reconfiguration 2
- Rafal Kielbik, Juan Manuel Moreno, Andrzej Napieralski, Grzegorz Jablonski, Tomasz Szymanski:
High-Level Partitioning of Digital Systems Based on Dynamically Reconfigurable Devices.
271-280
Electronic Edition (link) BibTeX
- Yoshiki Yamaguchi, Yosuke Miyajima, Tsutomu Maruyama, Akihiko Konagaya:
High Speed Homology Search Using Run-Time Reconfiguration.
281-291
Electronic Edition (link) BibTeX
- Matthias Dyer, Christian Plessl, Marco Platzner:
Partially Reconfigurable Cores for Xilinx Virtex.
292-301
Electronic Edition (link) BibTeX
- Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. M. Ferreira:
On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs.
302-311
Electronic Edition (link) BibTeX
Power Estimation
- Kara K. W. Poon, Andy Yan, Steven J. E. Wilton:
A Flexible Power Model for FPGAs.
312-321
Electronic Edition (link) BibTeX
- Oswaldo Cadenas, Graham M. Megson:
A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs.
322-331
Electronic Edition (link) BibTeX
- Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor.
332-339
Electronic Edition (link) BibTeX
- Elias Todorovich, M. Gilabert, Gustavo Sutter, Sergio López-Buedo, Eduardo I. Boemo:
A Tool for Activity Estimation in FPGAs.
340-349
Electronic Edition (link) BibTeX
Synthesis Issues
- Gustavo Sutter, Elias Todorovich, Sergio López-Buedo, Eduardo I. Boemo:
FSM Decomposition for Low Power in FPGA.
350-359
Electronic Edition (link) BibTeX
- Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar:
Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search.
360-369
Electronic Edition (link) BibTeX
- Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, S. Belkacemi:
A Prolog-Based Hardware Development Environment.
370-380
Electronic Edition (link) BibTeX
- Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner:
Fly - A Modifiable Hardware Compiler.
381-390
Electronic Edition (link) BibTeX
Keynote Address
Communication Applications 1
- Masayuki Kirimura, Yoshifumi Takamoto, Takanori Mori, Keiichi Yasumoto, Akio Nakata, Teruo Higashino:
Design and Implementation of FPGA Circuits for High Speed Network Monitors.
393-403
Electronic Edition (link) BibTeX
- Maya Gokhale, Dave Dubois, Andy Dubois, Mike Boorman, Steve Poole, Vic Hogsett:
Granidt: Towards Gigabit Rate Network Intrusion Detection Technology.
404-413
Electronic Edition (link) BibTeX
New Technologies
Reconfigurable Architectures
Communication Applications 2
Multimedia Applications
FPGA-based Arithmetic 1
Reconfigurable Processors
- Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung:
Run-Time Adaptive Flexible Instruction Processors.
545-555
Electronic Edition (link) BibTeX
- José T. de Sousa, Fernando M. Gonçalves, Nuno Barreiro, João Moura:
DARP - A Digital Audio Reconfigurable Processor.
556-566
Electronic Edition (link) BibTeX
- Stephen Charlwood, Jonathan Mangnall, Steven F. Quigley:
System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors.
567-576
Electronic Edition (link) BibTeX
- Kurt K. Ting, Steve C. L. Yuen, Kin-Hong Lee, Philip Heng Wai Leong:
An FPGA Based SHA-256 Processor.
577-585
Electronic Edition (link) BibTeX
Testing & Fault-Tolerance
FPGA-based Arithmetic 2
- Rudolf Matousek, Milan Tichý, Zdenek Pohl, Jiri Kadlec, Christopher I. Softley, Nick Coleman:
Logarithmic Number System and Floating-Point Arithmetics on FPGA.
627-636
Electronic Edition (link) BibTeX
- Eric Roesler, Brent E. Nelson:
Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture.
637-646
Electronic Edition (link) BibTeX
- Silviu M. S. A. Chiricescu, Michael A. Schuette, Robin Glinton, Herman Schmit:
Morphable Multipliers.
647-656
Electronic Edition (link) BibTeX
- Pavle Belanovic, Miriam Leeser:
A Library of Parameterized Floating-Point Modules and Their Use.
657-666
Electronic Edition (link) BibTeX
Reconfigurable Systems
Image Processing
Crypto Applications 1
- Tim Kerins, Emanuel M. Popovici, William P. Marnane, Patrick Fitzpatrick:
Fully Parameterizable Elliptic Curve Cryptography Processor over GF(2).
750-759
Electronic Edition (link) BibTeX
- Antti Hämäläinen, Matti Tommiska, Jorma Skyttä:
8 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm.
760-769
Electronic Edition (link) BibTeX
- Emmanuel A. Moreira, Paul L. McAlpine, Simon D. Haynes:
Rijndael Cryptographic Engine on the UltraSONIC Reconfigurable Platform.
770-779
Electronic Edition (link) BibTeX
- Jean-Jacques Quisquater, François-Xavier Standaert, Gaël Rouvroy, Jean-Pierre David, Jean-Didier Legat:
A Cryptanalytic Time-Memory Tradeoff: First FPGA Implementation.
780-789
Electronic Edition (link) BibTeX
Keynote Address
Multitasking
Special Architectures
Crypto Applications 2
Compilation Techniques
DSP Applications 3
Complex Applications
Architecture Implementation
Design Flow
Miscellaneous
- George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis:
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations.
1027-1036
Electronic Edition (link) BibTeX
- Naoto Kaneko, Hideharu Amano:
A General Hardware Design Model for Multicontext FPGAs.
1037-1047
Electronic Edition (link) BibTeX
- Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rückert:
Dynamically Reconfigurable Hardware - A New Perspective for Neural Network Implementations.
1048-1057
Electronic Edition (link) BibTeX
- Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys:
A Compilation Framework for a Dynamically Reconfigurable Architecture.
1058-1067
Electronic Edition (link) BibTeX
Short Papers
- Shuichi Ichikawa, Shoji Yamamoto:
Data Dependent Circuit for Subgraph Isomorphism Problem.
1068-1071
Electronic Edition (link) BibTeX
- Jan Schmidt, Martin Novotný, Martin Jäger, Milos Becvár, Michal Jáchim:
Exploration of Design Space in ECDSA.
1072-1075
Electronic Edition (link) BibTeX
- Issam Damaj, Sohaib Majzoub, Hassan B. Diab:
2D and 3D Computer Graphics Algorithms under MORPHOSYS.
1076-1079
Electronic Edition (link) BibTeX
- Spyros Blionas, Kostas Masselos, Chrissavgi Dre, Christos Drosos, F. Z. Ieromnimon, T. Pagonis, A. Pneymatikakis, Anna Tatsaki, T. Trimis, A. Vontzalidis, Dimitris Metafas:
A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.
1080-1083
Electronic Edition (link) BibTeX
- Stephanie McBader, Luca Clementel, Alvise Sartori, Andrea Boni, Peter Lee:
SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor.
1084-1087
Electronic Edition (link) BibTeX
- Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba:
Real-Time Medical Diagnosis on a Multiple FPGA-based System.
1088-1091
Electronic Edition (link) BibTeX
- Kazuo Aoyama, Hiroshi Sawada:
Threshold Element-Based Symmetric Function Generators and Their Functional Extension.
1092-1096
Electronic Edition (link) BibTeX
- Wolfgang Schlecker, Achim Engelhart, Werner G. Teich, Hans-Jörg Pfleiderer:
Hardware Implementation of a Multiuser Detection Scheme Based on Recurrent Neural Networks.
1097-1100
Electronic Edition (link) BibTeX
- James Hwang, Jonathan Ballagh:
Building Custom FIR Filters Using System Generator.
1101-1104
Electronic Edition (link) BibTeX
- Klaus Feske, Georg Heinrich, Berndt Fritzsche, Mark Langer:
SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications.
1105-1109
Electronic Edition (link) BibTeX
- Ernest Jamro, Kazimierz Wiatr:
Dynamic Constant Coefficient Convolvers Implemented in FPGAs.
1110-1113
Electronic Edition (link) BibTeX
- Urs Kanus, Gregor Wetekam, Johannes Hirche, Michael Meißner:
VIZARD II: An FPGA-based Interactive Volume Rendering System.
1114-1117
Electronic Edition (link) BibTeX
- Naoyuki Izu, Tomonori Yokoyama, Junichiro Tsuchiya, Konosuke Watanabe, Hideharu Amano:
RHiNET/NI: A Reconfigurable Network Interface for Cluster Computing.
1118-1121
Electronic Edition (link) BibTeX
- Filip Miletic, Rene van Leuken, Alexander de Graaf:
General Purpose Prototyping Platform for Data-Processor Research and Development.
1122-1125
Electronic Edition (link) BibTeX
- Tomoyoshi Kobori, Tsutomu Maruyama:
High Speed Computation of Three Dimensional Cellular Automata with FPGA.
1126-1130
Electronic Edition (link) BibTeX
- Sylvain Poussier, Hassan Rabah, Serge Weber:
SOPC-based Embedded Smart Strain Gage Sensor.
1131-1134
Electronic Edition (link) BibTeX
- Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man:
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications.
1135-1138
Electronic Edition (link) BibTeX
- Roberto Gaudino, Vito De Feo, Marcello Chiaberge, Claudio Sansoè:
An FPGA-based Node Controller for a High Capacity WDM Optical Packet Network.
1139-1143
Electronic Edition (link) BibTeX
- Francis Calmon, M. Fathallah, P. J. Viverge, Christian Gontrand, Jordi Carrabina, P. Foussier:
FPGA and Mixed FPGA-DSP Implementations of Electrical Drive Algorithms.
1144-1147
Electronic Edition (link) BibTeX
- Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk:
Image Registration of Real-Time Broadcast Video Using the UltraSONIC Reconfigurable Computer.
1148-1151
Electronic Edition (link) BibTeX
- Dylan Carline, Paul Coulton:
A Novel Watermarking Technique for LUT Based FPGA Designs.
1152-1155
Electronic Edition (link) BibTeX
- Martin Henz, Edgar Tan, Roland H. C. Yap:
Implementing CSAT Local Search on FPGAs.
1156-1159
Electronic Edition (link) BibTeX
- Adronis Niyonkuru, Göran Eggers, Hans Christoph Zeidler:
A Reconfigurable Processor Architecture.
1160-1163
Electronic Edition (link) BibTeX
- Sebastian Friebe, Steffen Köhler, Rainer G. Spallek, Henrik Juhr, Klaus Künanz:
A Reconfigurable System-on-Chip-Based Fast EDM Process Monitor.
1164-1167
Electronic Edition (link) BibTeX
- Steve Guccione, Eric Keller:
Gene Matching Using JBits.
1168-1171
Electronic Edition (link) BibTeX
- Daniel G. Saab, Fatih Kocan, Jacob A. Abraham:
Massively Parallel/Reconfigurable Emulation Model for the D-algorithm.
1172-1176
Electronic Edition (link) BibTeX
- Akira Miyashita, Toshihito Fujiwara, Tsutomu Maruyama:
A Placement/Routing Approach for FPGA Accelerators.
1177-1182
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:12:42 2009
by Michael Ley (ley@uni-trier.de)