| 2003 |
|---|
| 3 | EE | Kuan Zhou,
Michael Chu,
Chao You,
Jong-Ru Guo,
Channakeshav,
John Mayega,
John F. McDonald,
Russell P. Kraft,
Bryan S. Goda:
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme.
FPGA 2003: 248 |
| 2002 |
|---|
| 2 | EE | Channakeshav,
Kuan Zhou,
Russell P. Kraft,
John F. McDonald:
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic.
Evolvable Hardware 2002: 60-62 |
| 1 | EE | Channakeshav,
Kuan Zhou,
Jong-Ru Guo,
Chao You,
Bryan S. Goda,
Russell P. Kraft,
John F. McDonald:
Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques.
FPL 2002: 414-423 |
