2006 |
15 | EE | Labros Bisdounis,
Spyros Blionas,
Enrico Macii,
Spiridon Nikolaidis,
Roberto Zafalon:
Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications.
J. Low Power Electronics 2(1): 18-26 (2006) |
2005 |
14 | EE | Labros Bisdounis,
Spyros Blionas,
Enrico Macii,
Spiridon Nikolaidis,
Roberto Zafalon:
Energy-Aware System-on-Chip for 5 GHz Wireless LANs.
PATMOS 2005: 166-176 |
13 | EE | Spiridon Nikolaidis,
Nikolaos Kavvadias,
T. Laopoulos,
Labros Bisdounis,
Spyros Blionas:
Instruction level energy modeling for pipelined processors.
J. Embedded Computing 1(3): 317-324 (2005) |
12 | EE | Aristodemos Pnevmatikakis,
Spyros Blionas,
Dimitris Triantis:
Physical Layer of a Base-band Ofdm Modem: Algorithms and Performance.
Journal of Circuits, Systems, and Computers 14(3): 631-651 (2005) |
2004 |
11 | EE | Evaggelia Theochari,
Konstantinos Tatas,
Dimitrios Soudris,
Kostas Masselos,
Konstantinos Potamianos,
Spyros Blionas,
Antonios Thanailakis:
A reusable IP FFT core for DSP applications.
ISCAS (3) 2004: 621-624 |
10 | EE | Christos Drosos,
Labros Bisdounis,
Dimitris Metafas,
Spyros Blionas,
Anna Tatsaki:
A Multi-level Validation Methodology for Wireless Network Applications.
PATMOS 2004: 332-341 |
9 | EE | Kostas Masselos,
Spyros Blionas,
Jean-Yves Mignolet,
A. Foster,
Dimitrios Soudris,
Spiridon Nikolaidis:
Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform.
PATMOS 2004: 613-622 |
8 | EE | Christos Drosos,
Chrissavgi Dre,
Dimitris Metafas,
Dimitrios Soudris,
Spyros Blionas:
The low power analogue and digital baseband processing parts of a novel multimode DECT/GSM/DCS1800 terminal.
Microelectronics Journal 35(7): 609-620 (2004) |
2003 |
7 | EE | Dimitrios Soudris,
Marios Kesoulis,
C. Koukourlis,
Adonios Thanailakis,
Spyros Blionas:
Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size.
ISCAS (2) 2003: 73-76 |
6 | EE | Spiridon Nikolaidis,
Nikolaos Kavvadias,
T. Laopoulos,
Labros Bisdounis,
Spyros Blionas:
Instruction Level Energy Modeling for Pipelined Processors.
PATMOS 2003: 279-288 |
5 | EE | Konstantinos Tatas,
K. Siozios,
Dimitrios Soudris,
Adonios Thanailakis,
Kostas Masselos,
Konstantinos Potamianos,
Spyros Blionas:
Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms.
PATMOS 2003: 430-439 |
4 | EE | Kostas Masselos,
Antti Pelkonen,
Miroslav Cupák,
Spyros Blionas:
Realization of wireless multimedia communication systems on reconfigurable platforms.
Journal of Systems Architecture 49(4-6): 155-175 (2003) |
2002 |
3 | EE | George Koutroumpezis,
Konstantinos Tatas,
Dimitrios Soudris,
Spyros Blionas,
Kostas Masselos,
Adonios Thanailakis:
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations.
FPL 2002: 1027-1036 |
2 | EE | Spyros Blionas,
Kostas Masselos,
Chrissavgi Dre,
Christos Drosos,
F. Z. Ieromnimon,
T. Pagonis,
A. Pneymatikakis,
Anna Tatsaki,
T. Trimis,
A. Vontzalidis,
Dimitris Metafas:
A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.
FPL 2002: 1080-1083 |
2001 |
1 | EE | Christos Drosos,
Chrissavgi Dre,
Spyros Blionas,
Dimitrios Soudris:
On the implementation of a baseband processor for a portable dual mode DECT/GSM terminal.
ISCAS (4) 2001: 334-337 |