Konstantinos Masselos
List of publications from the DBLP Bibliography Server - FAQ
2009 | ||
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32 | EE | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 305-315 (2009) |
2008 | ||
31 | EE | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework. FPL 2008: 179-184 |
30 | EE | Kieron Turkington, Turkington A. Constantinides, Kostas Masselos, Peter Y. K. Cheung: Outer Loop Pipelining for Application Specific Datapaths in FPGAs. IEEE Trans. VLSI Syst. 16(10): 1268-1280 (2008) |
29 | EE | Maria E. Angelopoulou, Kostas Masselos, Peter Y. K. Cheung, Yiannis Andreopoulos: Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet Transform Computation Schedules on FPGAs. Signal Processing Systems 51(1): 3-21 (2008) |
2007 | ||
28 | EE | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Automatic On-chip Memory Minimization for Data Reuse. FCCM 2007: 251-260 |
27 | EE | Nikos S. Voros, Konstantinos Masselos: Prototyping of a WLAN system using C++ based architecture exploration. MobiMedia 2007: 54 |
2006 | ||
26 | EE | Konstantinos Masselos, George A. Constantinides, Qiang Liu: Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm. FPL 2006: 1-6 |
25 | EE | Kieron Turkington, Konstantinos Masselos, George A. Constantinides, Philip Leong: FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach. FPL 2006: 1-6 |
24 | EE | Konstantinos Masselos, Kari Tiensyrjä, Yang Qu, Nikos S. Voros, Miroslav Cupák, Luc Rijnders, Marko Pettissalo: System Level Architecture Exploration for Reconfigurable Systems On Chip. FPL 2006: 1-6 |
23 | EE | Kostas Masselos, Yiannis Andreopoulos, Thanos Stouraitis: Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP. ISCAS 2006 |
2004 | ||
22 | EE | Kari Tiensyrjä, Miroslav Cupák, Kostas Masselos, Marko Pettissalo: SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip. FDL 2004: 428-440 |
21 | EE | Yang Qu, Kari Tiensyrjä, Kostas Masselos: System-Level Modeling of Dynamically Reconfigurable Co-processors. FPL 2004: 881-885 |
20 | EE | Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis: A reusable IP FFT core for DSP applications. ISCAS (3) 2004: 621-624 |
19 | EE | Kostas Masselos, Spyros Blionas, Jean-Yves Mignolet, A. Foster, Dimitrios Soudris, Spiridon Nikolaidis: Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform. PATMOS 2004: 613-622 |
18 | EE | Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man: Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors. VLSI Signal Processing 37(1): 53-73 (2004) |
2003 | ||
17 | EE | Antti Pelkonen, Kostas Masselos, Miroslav Cupák: System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC. IPDPS 2003: 174 |
16 | EE | Konstantinos Tatas, K. Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas: Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms. PATMOS 2003: 430-439 |
15 | EE | Kostas Masselos, Panagiotis Merakos, S. Theoharis, Thanos Stouraitis, Constantinos E. Goutis: Power efficient data path synthesis of sum-of-products computations. IEEE Trans. VLSI Syst. 11(3): 446-450 (2003) |
14 | EE | Kostas Masselos, Antti Pelkonen, Miroslav Cupák, Spyros Blionas: Realization of wireless multimedia communication systems on reconfigurable platforms. Journal of Systems Architecture 49(4-6): 155-175 (2003) |
13 | EE | Yiannis Andreopoulos, Peter Schelkens, Gauthier Lafruit, Kostas Masselos, Jan Cornelis: High-Level Cache Modeling for 2-D Discrete Wavelet Transform Implementations. VLSI Signal Processing 34(3): 209-226 (2003) |
2002 | ||
12 | EE | George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis: Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. FPL 2002: 1027-1036 |
11 | EE | Spyros Blionas, Kostas Masselos, Chrissavgi Dre, Christos Drosos, F. Z. Ieromnimon, T. Pagonis, A. Pneymatikakis, Anna Tatsaki, T. Trimis, A. Vontzalidis, Dimitris Metafas: A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip. FPL 2002: 1080-1083 |
10 | EE | Kostas Masselos, Panagiotis Merakos, Constantinos E. Goutis: Power Efficient Vector Quantization Design Using Pixel Truncation. PATMOS 2002: 409-418 |
9 | EE | Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man: A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processors. IEEE Trans. VLSI Syst. 10(4): 515-518 (2002) |
2000 | ||
8 | EE | Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis: Low power synthesis of sum-of-products computation (poster session). ISLPED 2000: 234-237 |
7 | EE | Kostas Masselos, Koen Danckaert, Francky Catthoor, Nikolaos D. Zervas, Constantinos E. Goutis, Hugo De Man: A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance Constraints. VLSI Signal Processing 26(3): 291-317 (2000) |
1999 | ||
6 | EE | Nikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis: Power exploration of multimedia applications realized on embedded cores. ISCAS (4) 1999: 378-381 |
5 | EE | Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis: Low power synthesis of sum-of-product computation in DSP algorithms. ISCAS (6) 1999: 420-423 |
4 | EE | Kostas Masselos, Koen Danckaert, Francky Catthoor, Constantinos E. Goutis, Hugo De Man: A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints. ISLPED 1999: 270-272 |
3 | EE | Koen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man, Constantinos E. Goutis: Strategy for power-efficient design of parallel systems. IEEE Trans. VLSI Syst. 7(2): 258-265 (1999) |
2 | EE | Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis: Novel techniques for bus power consumption reduction in realizations of sum-of-product computation. IEEE Trans. VLSI Syst. 7(4): 492-497 (1999) |
1998 | ||
1 | EE | Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis: Trade-Off Analysis of a Low-Power Image Coding Algorithm. VLSI Signal Processing 18(1): 65-80 (1998) |